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參數(shù)資料
| 型號(hào)： | UPA1818GR-9JG |
| 廠商： | NEC Corp. |
| 英文描述： | P-CHANNEL MOS FIELD EFFECT TRANSISTOR FOR SWITCHING |
| 中文描述： | P溝道MOS場(chǎng)效應(yīng)晶體管開關(guān) |
| 文件頁(yè)數(shù)： | 3/8頁(yè) |
| 文件大?。?/td> | 75K |
| 代理商： | UPA1818GR-9JG |
Data Sheet G16254EJ1V0DS
3
μ
PA1818
TYPICAL CHARACTERISTICS (T
A
= 25°C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
d
0
20
40
60
80
100
120
0
25
50
75
100
125
150
175
P
T
0
0.5
1
1.5
2
2.5
0
25
50
75
100
125
150
175
Mounted on ceramic
substrate of 5000 mm
2
x 1.1 mm
Mounted on FR-4 board
of 2500 mm
2
x 1.6 mm
T
A
- Ambient Temperature -
°
C
T
A
- Ambient Temperature -
°
C
FORWARD BIAS SAFE OPERATING AREA
I
D
-0.01
-0.1
-1
-10
-100
-0.1
-1
-10
-100
100 ms
10 ms
I
D(pulse)
I
D(DC)
PW = 1 ms
R
DS(on)
Limited
(V
GS
=
4.5 V)
DC
Single pulse
Mounted on ceramic
substrate of 5000 mm
2
x 1.1 mm
V
DS
- Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
t
°
C
0.1
1
10
100
1000
Single pulse
Mounted on FR-4 board
of 2500 mm
2
x 1.6 mm
125
°
C/W
Mounted on ceramic
substrate of 5000 mm
2
x 1.1 mm
62.5°C/W
PW - Pulse Width - s
1 m
10 m
100 m
1
10
100
1000
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
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