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參數(shù)資料
| 型號： | UPA1552BH |
| 廠商： | NEC Corp. |
| 英文描述： | N-CHANNEL POWER MOS FET ARRAY SWITCHING USE |
| 中文描述： | N溝道功率場效應(yīng)晶體管陣列開關(guān)使用 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 86K |
| 代理商： | UPA1552BH |
2
μ
PA1552B
ELECTRICAL CHARACTERISTICS (T
A
= 25 C)
CHARACTERISTIC
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Drain Leakage Current
I
DSS
V
DS
= 60 V, V
GS
= 0
10
μ
A
Gate Leakage Current
I
GSS
V
GS
=
±
20 V, V
DS
= 0
±
10
μ
A
Gate Cutoff Voltage
V
GS(off)
V
DS
= 10 V, I
D
= 1.0 mA
1.0
2.0
V
Forward Transfer Admittance
| Y
fs
|
V
DS
= 10 V, I
D
= 3.0 A
2.4
S
Drain to Source On-State
Resistance
R
DS(on)1
V
GS
= 10 V, I
D
= 3.0 A
0.09
0.18
R
DS(on)2
V
GS
= 4.0 V, I
D
= 3.0 A
0.12
0.24
Input Capacitance
C
iss
V
DS
= 10 V, V
GS
= 0, f = 1.0 MHz
200
pF
Output Capacitance
C
oss
150
pF
Reverse Transfer Capacitance
C
rss
55
pF
Turn-on Delay Time
t
d(on)
I
D
= 3.0 A, V
GS
= 10 V, V
DD
··
R
L
= 10
20
ns
Rise Time
t
r
100
ns
Turn-off Delay Time
t
d(off)
670
ns
Fall Time
t
f
310
ns
Total Gate Charge
Q
G
V
GS
= 10 V, I
D
= 5.0 A, V
DD
= 48 V
13
nC
Gate to Source Charge
Q
GS
2
nC
Gate to Drain Charge
Q
GD
4.7
nC
Body Diode Forward Voltage
V
F(S-D)
I
F
= 5.0 A, V
GS
= 0
1.0
V
Reverse Recovery Time
t
rr
I
F
= 5.0 A, V
GS
= 0, di/dt = 50 A/
μ
s
280
ns
Reverse Recovery Charge
Q
rr
820
nC
Test Circuit 3 Gate Charge
V
GS
= 20 V
→
0
PG
R
G
= 25
50
D.U.T.
L
V
DD
Test Circuit 1 Avalanche Capability
PG.
R
G
= 10
D.U.T.
R
L
V
DD
Test Circuit 2 Switching Time
R
G
PG.
I
G
= 2 mA
50
D.U.T.
R
L
V
DD
I
D
V
DD
I
AS
V
DS
BV
DSS
Starting T
CH
V
GS
0
t = 1 s
Duty Cycle
≤
1 %
V
GS
Wave Form
D
Wave Form
V
GS
I
D
10 %
10 %
0
0
90 %
90 %
90 %
10 %
V
GS (on)
I
D
t
on
t
off
t
d (on)
t
r
t
d (off)
t
f
t
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