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參數(shù)資料
| 型號： | U2894B-AFSG3 |
| 英文描述： | Modulation PLL for GSM, DCS and PCS Systems |
| 中文描述： | 調(diào)制鎖相環(huán)用于GSM，DCS和PCS系統(tǒng) |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 802K |
| 代理商： | U2894B-AFSG3 |
U2894B
Rev. A4, 30-Sep-98
2 (16)
Ordering Information
Extended Type Number
Package
Remarks
U2894B-AFSG3
SSO28
Taped and reeled
Pin Description
1
2
3
4
5
6
7
8
10
9
27
22
21
20
18
19
17
12
11
28
25
26
23
24
NMDO
VS1
VSP
CPO
GNDP
CPC
GND
MDO
PUMIX
MDLO
NI
I
NRF
RF
VS2
MIXLO
PU
GND
MIXO
GND
NND
VS3
NQ
Q
16
15
14
13
12495
RD
NRD
ND
MC
Figure 2. Pinning
Pin
Symbol
Function
1
I
In-phase baseband input
2
NI
Complementary to I
3
MDLO
I/Q-modulator LO input
4
GND 1)
Negative supply
5
MDO
I/Q-modulator output
6
NMDO
Complementary to MDO
7
VS1 3)
Positive supply (I/Q MOD)
8
VSP
Pos. supply charge pump
9
CPO
Charge-pump output
10
GNDP 2)
Neg. supply charge pump
11
CPC
Charge-pump current control
(input)
12
PUMIX
Power-up, mixer only
13
RD
R-divider input
14
NRD
Complementary to RD
15
MC
Mode control
16
ND
N-divider input
17
NND
Complementary to ND
18
GND 1)
Negative supply
19
PU
Power-up, whole chip except
mixer
20
MIXLO
Mixer LO input
21
VS2 3)
Positive supply (MISC.)
22
RF
Mixer RF-input
23
NRF
Complementary to RF
24
GND 1)
Negative supply
25
MIXO
Mixer output
26
VS3 3)
Positive supply (mixer)
27
NQ
Complementary to Q
28
Q
Quad.-phase baseband input
1)
All GND pins must be connected to GND
potential. No DC voltage between GND pins!
2)
Max. voltage between GNDP and GND pins
v 200 mV
3)
The maximum permissible voltage difference
between pins VS1, VS2 and VS3 is
v200 mV.
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