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參數(shù)資料
| 型號： | U2782B-AFS |
| 英文描述： | Ring Tongue Solderless Terminal; Wire Size (AWG):6; Stud Size:#10 RoHS Compliant: Yes |
| 中文描述： | 1100兆赫雙鎖相環(huán) |
| 文件頁數(shù)： | 5/10頁 |
| 文件大小： | 159K |
| 代理商： | U2782B-AFS |
U2782B
TELEFUNKEN Semiconductors
Rev. A4, 17-Oct-97
5 (10)
Serial Programming Bus
Control Bits:
P0 ... P4:
o.c. output ports (1 = high impedance)
LPA, LPB:
selection of P2 output or locksignal
LPA
LPB
function of pin 10
0
0
1
1
0
1
0
1
o.c. output P2
locksignal of synthesizer 2
locksignal of synthesizer 1
wiredor locksignal of both synthesizer
H1P, H2P:
selection of P1/4 output or hardware power down input of synthesizer 1/2 (0 = Port / 1 = HPD)
5IP:
selection of P0 output or high current switching input for the charge pump current of synthesizer 1
(0 = Port / 1 = charge pump 1 current switch input)
PS1, PS2:
phase selection of synthesizer 1 and synthesizer 2 (1 = normal / 0 = invers)
PS-PLL1/2 = 1
CP1/2
I
sink
I
source
0
PS-PLL1/2 = 0
CP1/2
I
source
I
sink
0
f
R
> f
P
f
R
< f
P
f
R
= f
P
RF/2: divide by 2 prescaler for reference divider (0 = off / 1 = on)
SPD1, SPD2: software power down bit of synthesizer 1/2 (0 = powerdown / 1 = powerup)
5I:
software switch for the charge pump current of synthesizer 1 (0 = low current / 1 = high current)
TRI1, TRI2: enables tristate for the charge pump of synthesizer 1/2 (0 = normal / 1 = tristate)
TEST: enables counter testmode (0 = disabled / 1 = enabled)
TEST
LPA
LPB
PS1
PS2
Testsignal
at pin 10
RFD1
PGD1
RFD2
PGD2
1
1
1
1
1
1
0
0
0
0
1
1
1
0
x
x
x
x
1
0
To operate the software power down mode the following condition must be set: HXP = 0; power up and power down
will be set by SPDX = 1 (on) and SPDX = 0 (off).
To operate the hardware power down mode the following condition must be set: HXP = 1; SPDX = 1; power up and
power down will be set by high and low state at the hardware power down pins 9/14.
High current of charge pump synthesizer 1 is active when 5I = 1 and if 5IP = 1 the charge pump current control input
pin 1 is in high state.
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