參數(shù)資料
型號(hào): TZA3030U
廠商: NXP SEMICONDUCTORS
元件分類: 數(shù)字傳輸電路
英文描述: SDH/SONET STM1/OC3 optical receiver
中文描述: RECEIVER, UUC32
文件頁(yè)數(shù): 11/20頁(yè)
文件大小: 502K
代理商: TZA3030U
1998 Aug 24
11
Philips Semiconductors
Objective specification
SDH/SONET STM1/OC3 optical receiver
TZA3030
Notes
1.
OUTPECL, OUTQPECL, OUTCML, OUTQCML, LOS and LOSQ outputs are left unconnected. OUTPECL and
OUTQPECL outputs are active.
OUTPECL and OUTQPECL outputs are terminated with 50
to V
T
. V
T
is an external termination voltage for PECL
outputs and is 2 V below the supply voltage. OUTCML, OUTQCML, LOS and LOSQ outputs are left unconnected.
OUTCML and OUTQCML outputs are terminated with 50
to V
CCD
; CML outputs are active. OUTPECL,
OUTQPECL, LOS and LOSQ outputs are left unconnected.
The bandwidth is set to 120 MHz by default. It can be varied between 90 and 150 MHz by adjusting the voltage at
pin BWC.
All I
n(tot)
measurements were made with an input capacitance of C
i
= 1.2 pF. This was comprised of 0.7 pF for the
photodiode itself, with 0.3 pF allowed for the PCB layout and 0.2 pF intrinsic to the package.
PSRR is defined as the ratio of the equivalent current change at the input (
I
IPhoto
) to a change in supply voltage:
CC
2.
3.
4.
5.
6.
For example, a 4 mV disturbance on V
CC
at 10 MHz will typically generate the equivalent of 2 nA extra photodiode
current.
PECL outputs: LOS and LOSQ
V
OH
V
OL
V
OO
t
r
t
f
HIGH-level output voltage
LOW-level output voltage
output offset voltage
rise time
fall time
50
to V
CC
2 V
50
to V
CC
2 V
measured differentially
20% to 80%
80% to 20%
V
CC
1100
V
CC
1840
10
V
CC
900
V
CC
1620
+10
600
200
mV
mV
mV
ns
ns
CML outputs: OUTCML and OUTQCML
V
O
output voltage
measured single-ended;
50
to V
CC
50
to V
CC
V
CC
260
V
CC
mV
V
o(se)(p-p)
output voltage single-ended
(peak-to-peak value)
output offset voltage
150
200
260
mV
V
OO
measured differentially;
50
to V
CC
measured single-ended
20% to 80%;
R
L
= 50
; C
L
= 1 pF
80% to 20%;
R
L
= 50
; C
L
= 1 pF
10
+10
mV
R
o
t
r
output resistance
rise time
80
100
tbf
120
ps
t
f
fall time
tbf
ps
CMOS input: OUTSEL
V
IL
V
IH
LOW-level input voltage
HIGH-level input voltage
V
CC
1
0.4
V
CC
0.5
0.8
V
V
CMOS output: LOSTTL
V
OL
V
OH
LOW-level output voltage
HIGH-level output voltage
0
V
CC
0.2
0.2
V
CC
V
V
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
PSRR
-------V
=
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