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參數(shù)資料
| 型號： | TZA3013BU |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | SDH/SONET STM16/OC48 transimpedance amplifier |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, UUC15 |
| 封裝： | DIE-15 |
| 文件頁數(shù)： | 6/16頁 |
| 文件大?。?/td> | 104K |
| 代理商： | TZA3013BU |
2001 Feb 26
6
Philips Semiconductors
Product specification
SDH/SONET STM16/OC48
transimpedance amplifier
TZA3013A; TZA3013B
PIN diode bias voltage DREF
The performance of an optical receiver is largely
determined by the combined effect of the transimpedance
amplifier and the PIN diode. In particular, the method used
toconnectthePIN diodetotheinputandthelayoutaround
the input pad strongly influences the main parameters of a
transimpedance amplifier, such as sensitivity, bandwidth,
and PSRR. Sensitivity is most affected by the value of the
total capacitance at the input pad. Therefore, to obtain the
highest possible sensitivity requires the value of total
capacitance to be as low as possible by reducing the
capacitanceofthePIN diodeandtheparasiticsaroundthe
input pad. To minimize parasitics, the PIN diode should be
placed as close as physically possible to the IC. The
capacitance of the PIN diode can be reduced by making
the value of reverse voltage across it as high as possible.
The PIN diode can be connected to the input in two ways.
Figure 5 shows the PIN diode connected between
pads DREF and IN.
Pad DREF provides an easy bias voltage for the
PIN diode. The voltage at DREF is derived from V
CC
by a
low-pass filter comprising internal resistor R1 and external
capacitor C2 which decouples any supply voltage noise.
The value of external capacitor C2 affects the value of
PSRR and should have a minimum value of 100 pF.
Increasing this value increases the value of PSRR.
For a supply voltage of 3.3 V, the reverse voltage across
the PIN diode is 2.438 V (3.3 V
0.862 V). It is preferable
to connect the cathode of the PIN diode to a voltage higher
than V
CC
if there is one available on the PCB, leaving
pad DREF unconnected. If a negative supply voltage is
available, the configuration shown in Fig.6 can be used.
It should be noted that in this configuration, the direction of
the signal current is reversed to that shown in Fig.5. It is
essential that the PIN diode bias voltage is correctly
filtered to achieve the highest possible level of sensitivity.
handbook, halfpage
R1
270
C2
100 pF
VCC
Ii
1
30
TZA3013
2
IN
DREF
MGU120
Fig.5
ThePIN diodeconnectedbetweentheinput
and pad DREF.
handbook, halfpage
MGT103
270
VCC
Ii
1
30
TZA3013
2
IN
DREF
negative supply
Fig.6
ThePIN diodeconnectedbetweentheinput
and a negative supply voltage.
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