參數(shù)資料
型號: TVP5154AIPNPR
廠商: TEXAS INSTRUMENTS INC
元件分類: 顏色信號轉(zhuǎn)換
英文描述: COLOR SIGNAL DECODER, PQFP128
封裝: PLASTIC, HTQFP-128
文件頁數(shù): 35/92頁
文件大小: 1089K
代理商: TVP5154AIPNPR
SLES214C – DECEMBER 2007 – REVISED SEPTEMBER 2010
www.ti.com
7.2.21
Genlock and RTC Register
Address
15h
Default
01h
7
6
5
4
3
2
1
0
Stable syncs
Reserved
F/V bit control
Auto inc
GLCO/RTC
Stable syncs
0 = Output F and V bits follow the input signal producing fixed vertical blanking periods by adapting the active video.
1 = Output F and V bits produce fixed active video periods by adapting the vertical blanking.
F/V bit control
Table 7-5. F/V Bit Control
BIT 5
BIT 4
NUMBER OF LINES
F BIT
V BIT
Standard
ITU-R BT.656
0
Nonstandard even
Force to 1
Switch at field boundary
Nonstandard odd
Toggles
Switch at field boundary
Standard
ITU-R BT.656
0
1
Nonstandard
Toggles
Switch at field boundary
Standard
ITU-R BT.656
1
0
Nonstandard
Pulse mode
Switch at field boundary
1
Illegal
Auto inc: When this bit is set to 1, subsequent reading/writing from/to back door registers automatically
increment the address index.
GLCO/RTC: Table 7-6 for different modes.
Table 7-6. GLCO/RTC Control
BIT 2
BIT 1
BIT 0
GENLOCK/RTC MODE
0
x
0
GLCO
0
x
1
RTC output mode 0 (default)
1
x
0
GLCO
1
x
1
RTC output mode 1
All other values are reserved.
Figure 6-1 shows the timing of GLCO and the timing of RTC.
40
Internal Control Registers
Copyright 2007–2010, Texas Instruments Incorporated
Product Folder Link(s): TVP5154A
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