參數(shù)資料
型號(hào)： TVP5150PBS
廠商： TEXAS INSTRUMENTS INC
元件分類： 顏色信號(hào)轉(zhuǎn)換
英文描述： COLOR SIGNAL DECODER, PQFP32
封裝： PLASTIC, TQFP-32
文件頁(yè)數(shù)： 20/68頁(yè)
文件大?。?/td> 917K
代理商： TVP5150PBS
Functional Description
21
May 2006
SLES043A
Step 6
0
I2C Stop (master)
P
3.18.2.2 Read Phase 2
Step 7
0
I2C Start (master)
S
Step 8
7
6
5
4
3
2
1
0
I2C General address (master)
1
0
1
0
X
1
Step 9
9
I2C Acknowledge (slave)
A
Step 10
7
6
5
4
3
2
1
0
I2C Read data (slave)
Data
Step 11
9
I2C Not Acknowledge (master)
A
Step 12
0
I2C Stop (master)
P
Repeat steps 10 and 11 for all bytes read. Master does not acknowledge the last read data received.
3.18.2.3 I2C Timing Requirements
The TVP5150 device requires delays in the I2C accesses to accommodate its internal processor’s timing. In
accordance with I2C specifications, the TVP5150 device holds the I2C clock line (SCL) low to indicate the wait
period to the I2C master. If the I2C master is not designed to check for the I2C clock line held-low condition,
then the maximum delays must always be inserted where required. These delays are of variable length;
maximum delays are indicated in the following diagram:
Normal register writing address 00h8Fh (addresses 90hFFh do not require delays)
Start
Slave address
(B8h)
Ack
Subaddress
Ack
Data
(XXh)
Ack
Wait 64
s
Stop
3.19 Clock Circuits
An internal line-locked phase-locked loop (PLL) generates the system and pixel clocks. The PLL minimizes
jitter and process and environmental variability. It is capable of operating off a single crystal frequency with
a high supply rejection ratio. A 14.318-MHz clock is required to drive the PLL. This may be input to the
TVP5150 device on terminal 5 (XTAL1), or a crystal of 14.318-MHz fundamental resonant frequency may be
connected across terminals 5 and 6 (XTAL2). Figure 312 shows the reference clock configurations. For the
example crystal circuit shown (a parallel-resonant crystal with 14.318-MHz fundamental frequency), the
external capacitors must have the following relationship:
CL1 = CL2 = 2CL CSTRAY,
where CSTRAY is the terminal capacitance with respect to ground. Please note that with the crystal oscillator,
an external 100-k
resistor can be optionally put across XTAL1 and XTAL2 terminals. Figure 312 shows the
reference clock configurations.
相關(guān)PDF資料
PDF描述
TVP5150PBSR COLOR SIGNAL DECODER, PQFP32
TVP5151IPBSQ1 COLOR SIGNAL DECODER, PQFP32
TVP5151IPBSRQ1 COLOR SIGNAL DECODER, PQFP32
TVP5151IPBSR COLOR SIGNAL DECODER, PQFP32
TVP5151IPBS COLOR SIGNAL DECODER, PQFP32
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TVP5150PBS 制造商:Texas Instruments 功能描述:IC DECODER VIDEO SMD
TVP5150PBSG4 功能描述:視頻 IC VERY LOW POWER VIDEO DECODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
TVP5150PBSR 功能描述:視頻 IC Very Low Power Video Decoder RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
TVP5150PBSRG4 制造商:Texas Instruments 功能描述:
TVP5151 制造商:TI 制造商全稱:Texas Instruments 功能描述:Ultralow-Power NTSC/PAL/SECAM Video Decoder
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