參數(shù)資料
型號: TVP5020CPFP
廠商: TEXAS INSTRUMENTS INC
元件分類: 顏色信號轉(zhuǎn)換
英文描述: COLOR SIGNAL DECODER, PQFP80
封裝: POWERPAD, PLASTIC, HTQFP-80
文件頁數(shù): 22/87頁
文件大?。?/td> 394K
代理商: TVP5020CPFP
2–15
2.6.3
I2C Read Operation
The read operation has two phases, the address phase and the data phase. In the address phase, the I2C
master initiates a write operation to the TVP5020 by generating a start condition followed by the TVP5020’s
I2C address (101110X). The address is in MSB first bit order followed by a 0 to indicate a write cycle. After
receiving a TVP5020 acknowledge, the I2C master sends a subaddress of the register or the block of
registers where it will read. The TVP5020 acknowledges the receipt of the address. The I2C master ends
the address phase by generating a stop condition. During the data phase, the I2C master initiates a read
operation to the TVP5020 by generating a start condition followed by the TVP5020’s I2C address (101110X).
The address is in MSB first bit order followed by a 1 to indicate a read cycle. After receiving a TVP5020
acknowledge, the TVP5020 transfers a data byte to the master. The I2C master acknowledges the receipt
of each byte upon completion of each transfer. After the TVP5020 transfers the last byte, the I2C master ends
the read operation by generating a not acknowledge followed by a stop condition.
Read Address Phase
0
I2C Start (Master)
S
7
6
5
4
3
2
1
0
I2C General address (Master)
1
0
1
0
X
0
9
I2C Acknowledge (Slave)
A
7
6
5
4
3
2
1
0
I2C Write register address (Master)
Addr
9
I2C Acknowledge (Slave)
A
0
I2C Stop (Master)
P
Read Data Phase
0
I2C Start (Master)
S
7
6
5
4
3
2
1
0
I2C General address (Master)
1
0
1
0
X
1
9
I2C Acknowledge (Slave)
A
7
6
5
4
3
2
1
0
I2C Read data (Slave)
Data
9
I2C Acknowledge (Master)
/A
0
I2C Stop (Master)
P
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