參數(shù)資料
型號(hào)： TSPC860SRMZPU50D4
廠商： E2V TECHNOLOGIES PLC
元件分類(lèi)： 微控制器/微處理器
英文描述： 32-BIT, 50 MHz, RISC PROCESSOR, PBGA357
封裝： PLASTIC, BGA-357
文件頁(yè)數(shù)： 34/90頁(yè)
文件大?。?/td> 2351K
代理商： TSPC860SRMZPU50D4
4
TSPC860
2129A–HIREL–08/02
–
Protocols Supported by ROM or Downloadable Microcode and Include, but
Limited to, the Digital Portion of:
- Ethernet/IEEE 802.3 CS/CDMA
- HDLC2/SDLC and HDLC bus
- Apple Talk
- Signaling System #7 (RAM Microcode Only)
- Universal Asynchronous Receiver Transmitter (UART)
- Synchronous UART
- Binary Synchronous (BiSync) Communications
- Totally Transparent
- Totally Transparent with CRC
- Profibus (RAM Microcode Option)
- Asynchronous HDLC
- DDCMP
- V.14 (RAM Microcode Option)
- X.21 (RAM Microcode Option)
- V.32bis Datapump Filters
- IrDA Serial Infrared
- Basis Rate ISDN (BRI) in Conjunction with SMC Channels
- Primary Rate ISDN (MH Version Only)
–
Four Hardware Serial Communications Controller Channels Supporting the
Protocols
–
Two Hardware Serial Management Channels
- Management for BRI Devices as General Circuit Interface Controller
Multiplexed Channels
- Low-speed UART operation
–
Hardware Serial Peripheral Interfaces
–
Two-wire Interface (TWI)
–
Time-slot Assigner
–
Port Supports Centronics Interfaces and Chip-to-chip
–
Four Independent Baud Rate Generators and Four Input Clock Pins for
Supplying Clocks to SMC and SCC Serial Channels
–
Four Independent 16-bit timers Which Can Be Interconnected as Two 32-bit
Timers
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