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| 型號： | TSL1401R |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 128 】 1 LINEAR SENSOR ARRAY WITH HOLD |
| 中文描述： | 128】1傳感器陣列線性拒不退讓 |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 117K |
| 代理商： | TSL1401R |
TSL1401R
128
×
1 LINEAR SENSOR ARRAY WITH HOLD
TAOS035B – AUGUST 2002
4
Copyright 2002, TAOS Inc.
The LUMENOLOGY Company
www.taosinc.com
Electrical Characteristics at f
clock
= 1 MHz, V
DD
= 5 V, T
A
= 25
°
C,
λ
p
= 640 nm, t
int
= 5 ms,
R
L
= 330
, E
e
= 11
μ
W/cm
2
(unless otherwise noted) (see Note 2)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
out
V
drk
PRNU
Analog output voltage (white, average over 128 pixels)
See Note 3
1.6
2
2.4
V
Analog output voltage (dark, average over 128 pixels)
E
e
= 0
See Note 4
0
0.1
±
4%
±
0.4%
0.2
V
Pixel response nonuniformity
±
7.5%
Nonlinearity of analog output voltage
See Note 5
FS
Output noise voltage
See Note 6
1
mVrms
R
e
Responsivity
See Note 7
25
35
45
V/
(μ
J/cm
2
)
V
sat
Analog output saturation voltage
V
DD
= 5 V, R
L
= 330
V
DD
= 3 V, R
L
= 330
V
DD
= 5 V, See Note 8
V
DD
= 3 V, See Note 8
All pixels, E
e
= 0, See Note 9
See Note 10
4.5
4.8
V
2.5
2.8
SE
Saturation exposure
136
nJ/cm
2
78
DSNU
Dark signal nonuniformity
0.02
0.05
V
IL
Image lag
0.5%
I
DD
Supply current
V
DD
= 5 V, E
e
= 0
V
DD
= 3 V, E
e
= 0
V
I
= V
DD
V
I
= 0
2.8
4.5
mA
2.6
4.5
I
IH
I
IL
C
i
NOTES:
High-level input current
1
μ
A
μ
A
pF
Low-level input current
1
Input capacitance
2. All measurements made with a 0.1
μ
F capacitor connected between V
DD
and ground.
3. The array is uniformly illuminated with a diffused LED source having a peak wavelength of 640 nm.
4. PRNU is the maximum difference between the voltage from any single pixel and the average output voltage from all pixels of the
device under test when the array is uniformly illuminated at the white irradiance level. PRNU includes DSNU.
5. Nonlinearity is defined as the maximum deviation from a best-fit straight line over the dark-to-white irradiance levels, as a percent
of analog output voltage (white).
6. RMS noise is the standard deviation of a single-pixel output under constant illumination as observed over a 5-second period.
7. R
e(min)
= [V
out(min)
– V
drk(max)
]
÷
(E
e
×
t
int
)
8. SE(min) = [V
sat(min)
– V
drk(min)
]
×
E
e
×
t
int
)
÷
[V
out(max)
– V
drk(min)
]
9. DSNU is the difference between the maximum and minimum output voltage for all pixels in the absence of illumination.
10. Image lag is a residual signal left in a pixel from a previous exposure. It is defined as a percent of white-level signal remaining after
a pixel is exposed to a white condition followed by a dark condition:
5
IL
Vout (IL)
Vout (white)
Vdrk
Vdrk
100
Timing Requirements (see Figure 1 and Figure 2)
MIN
NOM
MAX
UNIT
t
su(SI)
t
h(SI)
t
w
t
r
, t
f
NOTES: 11. Input pulses have the following characteristics: t
r
= 6 ns, t
f
= 6 ns.
12. SI must go low before the rising edge of the next clock pulse.
Setup time, serial input (see Note 11)
20
ns
Hold time, serial input (see Note 11 and Note 12)
0
ns
Pulse duration, clock high or low
50
ns
Input transition (rise and fall) time
0
500
ns
Dynamic Characteristics over recommended ranges of supply voltage and operating free-air
temperature (see Figures 7 and 8)
PARAMETER
TEST CONDITIONS
R
L
= 330
,
MIN
TYP
MAX
UNIT
t
s
Analog output settling time to
±
1%
C
L
= 10 pF
120
ns
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