參數(shù)資料
型號: TSC80251G2D-16CB
廠商: TEMIC SEMICONDUCTORS
元件分類: 8位微控制器
英文描述: 8/16-bit Microcontroller with Serial Communication Interfaces
中文描述: 16位產(chǎn)品微控制器的串行通信接口
文件頁數(shù): 21/63頁
文件大小: 878K
代理商: TSC80251G2D-16CB
21
Rev. A - May 7, 1999
TSC80251G2D
Table 24. Summary of Logical Instructions (2/2)
Note:
1. A shaded cell denotes an instruction in the C51 Architecture.
Table 25. Summary of Multiply, Divide and Decimal-adjust Instructions
Note:
1. A shaded cell denotes an instruction in the C51 Architecture.
Shift Left Logical
SLL <dest>
<dest>
0
0
<dest>
n+1
<dest>
n
, n= 0..msb-1
(CY)
<dest>
msb
<dest>
msb
<dest>
msb
<dest>
n-1
<dest>
n
, n= msb..1
(CY)
<dest>
0
<dest>
msb
0
<dest>
n-1
<dest>
n
, n= msb..1
(CY)
<dest>
0
A
3:0
A
7:4
Binary Mode
Shift Right Arithmetic
SRA <dest>
Shift Right Logical
SRL <dest>
Swap
SWAP A
Mnemonic
<dest>, <src>
(1)
Comments
Source Mode
Bytes
States
Bytes
States
SLL
Rm
Shift byte register left through the MSB
3
2
2
1
WRj
Shift word register left through the MSB
3
2
2
1
SRA
Rm
Shift byte register right
3
2
2
1
WRj
Shift word register right
3
2
2
1
SRL
Rm
Shift byte register left
3
2
2
1
WRj
Shift word register left
3
2
2
1
SWAP
A
Swap nibbles within ACC
1
2
1
2
Multiply
MUL AB
MUL <dest>, <src>
DIV AB
(B:A)
(A)
×
(B)
extended dest opnd
dest opnd
×
src opnd
(A)
Quotient ((A)
(B))
(B)
Remainder ((A)
(B))
ext. dest opnd high
Quotient (dest opnd
src opnd)
ext. dest opnd low
Remainder (dest opnd
src opnd)
IF [[(A)
3:0
> 9]
[(AC)= 1]]
THEN (A)
3:0
(A)
3:0
+ 6 !affects CY;
IF [[(A)
7:4
> 9]
[(CY)= 1]]
THEN (A)
7:4
(A)
7:4
+ 6
Binary Mode
Divide
Divide
DIV <dest>, <src>
Decimal-adjust ACC
for Addition (BCD)
DA A
Mnemonic
<dest>, <src>
(1)
Comments
Source Mode
Bytes
States
Bytes
States
MUL
AB
Multiply A and B
1
5
1
5
Rmd, Rms
Multiply byte register and byte register
3
6
2
5
WRjd, WRjs
Multiply word register and word register
3
12
2
11
DIV
AB
Divide A and B
1
10
1
10
Rmd, Rms
Divide byte register and byte register
3
11
2
10
WRjd, WRjs
Divide word register and word register
3
21
2
20
DA
A
Decimal adjust ACC
1
1
1
1
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