- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359758 > TSC251G2DXXX-16CB IC CYCLONE III FPGA 5K 256 UBGA PDF資料下載
參數(shù)資料
| 型號： | TSC251G2DXXX-16CB |
| 英文描述： | IC CYCLONE III FPGA 5K 256 UBGA |
| 中文描述： | 微控制器 |
| 文件頁數(shù)： | 2/63頁 |
| 文件大?。?/td> | 878K |
| 代理商： | TSC251G2DXXX-16CB |
第1頁當(dāng)前第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁
2
Rev. A - May 7, 1999
TSC80251G2D
3. Features
G
Pin and Software Compatibility with Standard 80C51
Products and 80C51Fx/Rx/Rx+
G
Plug-In Replacement of Intel’s 8xC251Sx
G
C251 core: Intel’s MCS
251 D-step Compliance
40-byte register file
Registers accessible as Bytes, Words or Dwords
Three-stage instruction pipeline
16-bit internal code fetch
G
Enriched C51 Instruction Set
16-bit and 32-bit ALU
Compare and conditional jump instructions
Expanded set of move instructions
G
Linear Addressing
G
1 Kbyte of On-Chip RAM
G
External Memory Space (Code/Data) Programmable
from 64 Kbytes to 256 Kbytes
G
TSC87251G2D: 32 Kbytes of On-Chip EPROM/
OTPROM
SINGLE PULSE Programming Algorithm
G
TSC83251G2D: 32 Kbytes of On-Chip Masked ROM
G
TSC80251G2D: ROMless Version
G
Four 8-bit Parallel I/O Ports (Ports 0, 1, 2 and 3 of
the standard 80C51)
I/O
Port:
full
compatible) with independent Baud Rate Generator
G
Serial
duplex
UART
(80C51
G
SSLC: Synchronous Serial Link Controller
I
2
C multi-master protocol
μ
Wire and SPI master and slave protocols
G
Three 16-bit Timers/Counters (Timers 0, 1 and 2 of
the standard 80C51)
G
EWC: Event and Waveform Controller
Compatible with Intel’s Programmable Counter
Array (PCA)
Common 16-bit timer/counter reference with four
possible clock sources (Fosc/4, Fosc/12, Timer 1
and external input)
Five modules, each with four programmable
modes:
-
16-bit software timer/counter
-
16-bit
timer/counter
software pulse measurement
-
High-speed output and 16-bit software pulse
width modulation (PWM)
-
8-bit hardware PWM without overhead
capture
input
and
16-bit watchdog timer/counter capability
G
Secure 14-bit Hardware Watchdog Timer
G
Power Management
Power-On reset (integrated on the chip)
Power-Off flag (cold and warm resets)
Software programmable system clock
Idle mode
Power-Down mode
G
Keyboard Interrupt Interface on Port 1
G
Non Maskable Interrupt Input (NMI)
G
Real-Time Wait States Inputs (WAIT#/AWAIT#)
G
ONCE mode and full speed Real-Time In-Circuit
Emulation support (Third Party Vendors)
G
High Speed Versions:
4.5 to 5.5 V
16 MHz and 24 MHz
Typical operating current: 35 mA @ 24 MHz
24 mA @ 16 MHz
Typical power-down current: 2
μ
A
G
Low Voltage Version:
2.7 to 5.5 V
16 MHz
Typical operating current: 11 mA @ 3V
Typical power-down current: 1
μ
A
G
Temperature Ranges:
Commercial (0
°
C to +70
°
C)
Industrial (-40
°
C to +85
°
C)
Option: extended range (-55
°
C to +125
°
C)
G
Packages:
PDIL 40, PLCC 44 and VQFP 44
CDIL 40 and CQPJ 44 with window
Options: known good dice and ceramic packages
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TSC251G2DXXX-24CB | IC CYCLONE III FPGA 80K 484 FBGA |
| TSC251G2DXXX-24CED | IC CYCLONE III FPGA 80K 484 FBGA |
| TSC251G2DXXX-24IA | IC CYCLONE III FPGA 80K 484 FBGA |
| TSC251G2DXXX-24IB | IC CYCLONE III FPGA 80K 780FBGA |
| TSC251G2DXXX-L16CB | IC CYCLONE III FPGA 80K 780FBGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TSC251G2DXXX-24CB | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8/16-bit Microcontroller with Serial Communication Interfaces |
| TSC251G2DXXX-24CE | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8/16-bit Microcontroller with Serial Communication Interfaces |
| TSC251G2DXXX-24CED | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| TSC251G2DXXX-24IA | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8/16-bit Microcontroller with Serial Communication Interfaces |
| TSC251G2DXXX-24IB | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8/16-bit Microcontroller with Serial Communication Interfaces |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。