- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄365968 > TSC21020F-20MBSL3 IC CYCLONE III FPGA 25K 324 FBGA PDF資料下載
參數(shù)資料
| 型號： | TSC21020F-20MBSL3 |
| 英文描述： | IC CYCLONE III FPGA 25K 324 FBGA |
| 中文描述： | 數(shù)字信號處理器| 32位|的CMOS | RAD數(shù)據(jù)通信硬| QFL | 256PIN |陶瓷 |
| 文件頁數(shù)： | 1/51頁 |
| 文件大小： | 763K |
| 代理商： | TSC21020F-20MBSL3 |
當前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁
Rev. 4153F–AERO–06/03
1
Features
Superscalar IEEE Floating-Point-Processor
Off-Chip Harvard Architecture Maximizes Signal Processing Performance
50 ns, 20 MIPS Instruction Rate, Single Cycle Execution
60 MFLOPS Peak, 40 MFLOPS Sustained Performance
1024-Point Complex FFT Benchmark: 0.975 ms
Divide (y/x): 300 ns
Inverse Square Root (1/ /x): 450 ns
32-bit Single-Precision and 40-bit Extended-Precision IEEE Floating-Point Data
Formats
32-bit Fixed-Point Formats, Integer and Fractional, with 80-bit Accumulators
IEEE Exception Handling with Interrupt on Exception
Three Independent Computation Units: Multiplier, ALU, and Barrel Shifter
Dual Data Address Generators with Indirect, Immediate, Modulo, and Bit Reverse
Addressing Modes
Two Off-Chip Memory Transfers in Parallel with Instruction Fetch and Single-Cycle
Multiply and ALU Operations
Multiply with Add and Subtract for FFT Butterfly Computation
Efficient Program Sequencing with Zero Overhead Looping: Single-Cycle Loop Setup
Single-Cycle Register File Context Switch
23ns External RAM Access Time for Zero-Wait-State, 40 ns Instruction Execution
IEEE JTAG Standard 1149.1 Test Access Port and On-chip Emulation Circuitry
223 CPGA package for breadboarding
256 Multi-layer Quad Flat Pack, Flat Leads, For Flight Models
Fully compatible with Analog Devices ADSP-21020
Latch-up Immune
Total Dose Better Than 100 Krad (Si)
SEU Immunity Better Than 50 MeV/mg/cm
2
For 25 MHz Specification, Contact Atmel for Availability
Introduction
Atmel is manufacturing a radiation tolerant version of the Analog Devices ADSP-
21020 32/40-bit Floating-Point DSP.
The product is pin and code compatible with ADI product, making system develop-
ment straight forward and cost effective, using existing development tools and
algorithms.
Notes:
1. Design using patent from INPG-CNRS Denis BESSOT/Raoul VELAZCO
2. Product licensed from Analog Devices Inc.
Rad. Tolerant
32/40-bit IEEE
Floating Point
DSP
TSC21020F
相關PDF資料 |
PDF描述 |
|---|---|
| TSC21020F-20MC-E | FPGA, CYCLONE III, 25K LE, 256UBGA Programmable Logic Type:FPGA; Logic IC function:FPGA; Logic IC family:Cyclone III; Logic IC Base Number:3; I/O lines, No. of:156; |
| TSC21020F-20SA | IC CYCLONE III FPGA 25K 256 UBGA |
| TSC21020F-20SA-E | IC CYCLONE III FPGA 40K 324FBGA |
| TSC21020F-20SAP833 | FPGA, CYCLONE III, 40K LE, 324FBGA Programmable Logic Type:FPGA; Logic IC function:FPGA; Logic IC family:Cyclone III; Logic IC Base Number:3; I/O lines, No. of:195; |
| TSC21020F-20SASB | IC CYCLONE III FPGA 40K 324 FBGA |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TSC21020F-20MC-E | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Rad. Hard 32/40-bit IEEE Floating Point DSP |
| TSC21020F-20MC-SV | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Rad. Hard 32/40-bit IEEE Floating Point DSP |
| TSC21020F-20SA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP|32-BIT|CMOS| RAD HARD|PGA|223PIN|CERAMIC |
| TSC21020F-20SA/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP|32-BIT|CMOS| RAD HARD|PGA|223PIN|CERAMIC |
| TSC21020F-20SA-E | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP|32-BIT|CMOS| RAD HARD|PGA|223PIN|CERAMIC |
發(fā)布緊急采購，3分鐘左右您將得到回復。