參數(shù)資料
型號(hào)： TS8388BCG
英文描述： A/D CONVERTER
中文描述： 的A / D轉(zhuǎn)換器
文件頁(yè)數(shù)： 6/43頁(yè)
文件大?。?/td> 1530K
代理商： TS8388BCG
6
TS8388BG
Product Specification
Parameter
Symb
Test
level
Min
Typ
Max
Unit
DIGITAL OUTPUTS
(
notes 1,6
)
Single ended or differential input mode, 50 % clock duty cycle (CLK,CLKB), Binary output data format,
Tj (typical) = 70
°
C. Full temperature range : 0
°
C < Ta ; Tj < +90°C
Logic compatibility for digital outputs
( Depending on the value of V
PLUSD
)
(see Application Notes)
ECL or LVDS
Differential output voltage swings ( assuming V
PLUSD
= 0V) :
75
open transmission lines ( ECL levels )
75
differentially terminated
50
differentially terminated
4
1.50
0.70
0.54
1.620
0.825
0.660
V
V
V
Output levels ( assuming V
PLUSD
= 0V)
75
open transmission lines
(note 6)
4
Logic “0” voltage
V
OL
-1.62
-1.54
V
Logic “1” voltage
V
OH
-0.88
-0.8
V
Output levels ( assuming V
PLUSD
= 0V)
75
differentially terminated
(note 6)
4
Logic “0” voltage
V
OL
-1.41
-1.34
V
Logic “1” voltage
V
OH
-1.07
-1
V
Output levels ( assuming V
PLUSD
= 0V)
50
differentially terminated
(note 6)
Logic “0” voltage
V
OL
1, 2
-1.40
-1.32
V
V
Logic “1” voltage
V
OH
1, 2
-1.16
-1.10
V
V
Differential Output Swing
DOS
4
270
300
mV
Output level drift with temperature
4
1.6
mV/
°
C
DC ACCURACY
Single ended or differential input mode, 50 % clock duty cycle (CLK,CLKB), Binary output data format,
Tj (typical) = 70
°
C.
Differential non linearity
(notes 2,3)
DNL-
1
-0.6
-0.4
LSB
DNL+
1
0.4
0.6
LSB
Integral non linearity
(notes 2,3)
INL-
1
-1.2
-0.7
LSB
INL+
1
0.7
1.2
LSB
No missing codes
(note 3)
Guaranteed over specified temperature range
Gain error
1, 2
-10
-2
10
% FS
Input offset voltage
1, 2
-26
-5
26
mV
Gain error drift
Offset error drift
4
4
100
40
125
50
150
60
ppm/
°
C
ppm/
°
C
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