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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | TS80C31X2-LIE |
| 寤犲晢锛� | Atmel |
| 鏂囦欢闋佹暩(sh霉)锛� | 21/42闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC MCU 8BIT 30/20MHZ 44-VQFP |
| 妯欐簴鍖呰锛� | 9 |
| 绯诲垪锛� | 80C |
| 鏍稿績铏曠悊鍣細 | 8051 |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 30/20MHz |
| 閫ｉ€氭€э細 | UART/USART |
| 澶栧湇瑷�(sh猫)鍌欙細 | POR |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 32 |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | ROMless |
| RAM 瀹归噺锛� | 128 x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 2.7 V ~ 5.5 V |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 灏佽/澶栨锛� | 44-QFP |
| 鍖呰锛� | 鎵樼洡 |
绗�1闋�绗�2闋�绗�3闋�绗�4闋�绗�5闋�绗�6闋�绗�7闋�绗�8闋�绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�绗�18闋�绗�19闋�绗�20闋�鐣�(d膩ng)鍓嶇21闋�绗�22闋�绗�23闋�绗�24闋�绗�25闋�绗�26闋�绗�27闋�绗�28闋�绗�29闋�绗�30闋�绗�31闋�绗�32闋�绗�33闋�绗�34闋�绗�35闋�绗�36闋�绗�37闋�绗�38闋�绗�39闋�绗�40闋�绗�41闋�绗�42闋�
28
4428E鈥�8051鈥�02/08
AT/TS80C31X2
V
IH = VCC - 0.5V; XTAL2 N.C.; EA = RST = Port 0 = VCC. ICC would be slightly higher if a crystal
oscillator used..
2. Idle I
CC is measured with all output pins disconnected; XTAL1 driven with TCLCH, TCHCL = 5 ns,
V
3.).
3. Power Down I
CC is measured with all output pins disconnected; EA = VSS, PORT 0 = VCC;
XTAL2 NC.; RST = V
SS (see Figure 14-4.).
4. Capacitance loading on Ports 0 and 2 may cause spurious noise pulses to be superimposed
on the V
OLs of ALE and Ports 1 and 3. The noise is due to external bus capacitance discharg-
ing into the Port 0 and Port 2 pins when these pins make 1 to 0 transitions during bus
operation. In the worst cases (capacitive loading 100pF), the noise pulse on the ALE line may
exceed 0.45V with maxi V
OL peak 0.6V. A Schmitt Trigger use is not necessary.
5. Typicals are based on a limited number of samples and are not guaranteed. The values listed
are at room temperature and 5V.
6. Under steady state (non-transient) conditions, I
OL must be externally limited as follows:
Maximum I
OL per port pin: 10 mA
Maximum IOL per 8-bit port:
Port 0: 26 mA
Ports 1, 2 and 3: 15 mA
Maximum total IOL for all output pins: 71 mA
If I
OL exceeds the test condition, VOL may exceed the related specification. Pins are not guar-
anteed to sink current greater than the listed test conditions.
7. For other values, please contact your sales office.
8. Operating I
CC is measured with all output pins disconnected; XTAL1 driven with TCLCH, TCHCL =
5 ns (see Figure 14-5.), V
IL = VSS + 0.5 V,
VIH = VCC - 0.5V; XTAL2 N.C.; EA = Port 0 = VCC; RST = VSS. The internal ROM runs the code
80 FE (label: SJMP label). I
CC would be slightly higher if a crystal oscillator is used. Measure-
ments are made with OTP products when possible, which is the worst case.
Figure 14-1. ICC Test Condition, under reset
EA
VCC
ICC
(NC)
CLOCK
SIGNAL
V
CC
All other pins are disconnected.
RST
XTAL2
XTAL1
V
SS
V
CC
P0
鐩搁棞(gu膩n)PDF璩囨枡 |
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
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| TS80C31X2-LIEB | 鍒堕€犲晢:TEMIC 鍒堕€犲晢鍏ㄧū:TEMIC Semiconductors 鍔熻兘鎻忚堪:8-bit CMOS Microcontroller 0-60 MHz |
| TS80C31X2-LIED | 鍒堕€犲晢:TEMIC 鍒堕€犲晢鍏ㄧū:TEMIC Semiconductors 鍔熻兘鎻忚堪:8-bit CMOS Microcontroller 0-60 MHz |
| TS80C31X2-LIER | 鍒堕€犲晢:TEMIC 鍒堕€犲晢鍏ㄧū:TEMIC Semiconductors 鍔熻兘鎻忚堪:8-bit CMOS Microcontroller 0-60 MHz |
| TS80C31X2-LLAB | 鍒堕€犲晢:ATMEL 鍒堕€犲晢鍏ㄧū:ATMEL Corporation 鍔熻兘鎻忚堪:8-bit CMOS Microcontroller ROMless |
| TS80C31X2-LLAD | 鍒堕€犲晢:ATMEL 鍒堕€犲晢鍏ㄧū:ATMEL Corporation 鍔熻兘鎻忚堪:8-bit CMOS Microcontroller ROMless |
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