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參數(shù)資料
| 型號(hào)： | TS5A3160YZPR |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 1-ohm SPDT ANALOG SWITCH 5-V/3.3-V SINGLE-CHANNEL 2:1 MULTIPLEXER/DEMULTIPLEXER |
| 中文描述： | 1歐姆SPDT模擬開(kāi)關(guān)5-V/3.3-V單通道2:1多路復(fù)用器/解復(fù)用器 |
| 文件頁(yè)數(shù)： | 4/24頁(yè) |
| 文件大?。?/td> | 395K |
| 代理商： | TS5A3160YZPR |
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www.ti.com
Electrical Characteristics for 5-V Supply
(1)
V
+
= 4.5 V to 5.5 V, T
A
= –40
°
C to 85
°
C (unless otherwise noted)
TS5A3160
1-
SPDT ANALOG SWITCH
5-V/3.3-V SINGLE-CHANNEL 2:1 MULTIPLEXER/DEMULTIPLEXER
SCDS216–OCTOBER 2005
PARAMETER
Analog Switch
Analog signal
range
SYMBOL
TEST CONDITIONS
T
A
V
+
MIN
TYP
MAX
UNIT
V
COM
, V
NC
,
V
NO
0
V
+
V
25
°
C
Full
25
°
C
Full
25
°
C
0.8
1.1
1.5
0.9
1.1
0.1
Peak ON
resistance
0
≤
(V
or V
)
≤
V
+
,
I
COM
= –100 mA,
Switch ON,
See Figure 13
r
peak
4.5 V
0.7
ON-state
resistance
V
NO
or V
= 2.5 V,
I
COM
= –100 mA,
Switch ON,
See Figure 13
r
on
4.5 V
ON-state
resistance
match
between
channels
0.05
V
NO
or V
= 2.5 V,
I
COM
= –100 mA,
Switch ON,
See Figure 13
r
on
4.5 V
Full
0.1
0
≤
(V
or V
)
≤
V
+
,
I
COM
= –100 mA,
V
or V
NC
= 1 V, 1.5 V,
2.5 V,
I
COM
= –100 mA,
V
NC
or V
= 1 V,
V
COM
= 4.5 V,
or
V
NO
= 4.5 V, V
COM
= 1 V,
Switch ON,
See Figure 13
25
°
C
0.15
ON-state
resistance
flatness
r
on(flat)
4.5 V
25
°
C
0.1
0.25
Switch ON,
See Figure 13
Full
0.25
25
°
C
–20
2
20
I
NC(OFF)
,
I
NO(OFF)
Switch OFF,
See Figure 14
5.5 V
nA
NC, NO
OFF leakage
current
Full
–100
100
25
°
C
Full
25
°
C
–1
0.2
1
I
NC(PWROFF)
,
I
NO(PWROFF)
V
NC
or V
= 0 to 5.5 V,
V
COM
= 5.5 V to 0,
Switch OFF,
See Figure 14
0 V
μ
A
–20
–20
20
20
NC, NO
ON leakage
current
COM
OFF leakage
current
2
I
NC(ON)
,
I
NO(ON)
V
NC
or V
= 0 to V
+
,
V
COM
= Open,
Switch ON,
See Figure 15
5.5 V
nA
Full
–100
100
25
°
C
–1
0.1
1
V
COM
= 0 to 5.5 V,
V
NC
or V
NO
= 5.5 V to 0,
Switch OFF,
See Figure 14
I
COM(PWROFF)
0 V
μ
A
Full
–20
20
V
COM
= 1 V,
V
NC
or V
NO
= Open,
or
V
COM
= 4.5 V,
V
NC
or V
NO
= Open,
25
°
C
–20
2
20
COM
ON leakage
current
Switch ON,
See Figure 15
I
COM(ON)
5.5 V
nA
Full
–100
100
Digital Control Input (IN)
(2)
Input logic
high
Input logic low
V
IH
Full
2.4
5.5
V
V
IL
Full
25
°
C
Full
0
0.8
0.2
100
V
–2
Input leakage
current
I
IH
, I
IL
V
I
= 5.5 V or 0
5.5 V
μ
A
100
(1)
(2)
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
All unused digital inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs
, literature number SCBA004.
4
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