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參數(shù)資料
| 型號(hào)： | TRU050-TELNB-44M7360000 |
| 廠商： | VECTRON INTERNATIONAL |
| 元件分類： | XO, clock |
| 英文描述： | PHASE LOCKED LOOP, CDIP16 |
| 封裝： | ROHS COMPLIANT, HERMETIC SEALED, CERAMIC, SMD-16 |
| 文件頁(yè)數(shù)： | 1/14頁(yè) |
| 文件大?。?/td> | 0K |
| 代理商： | TRU050-TELNB-44M7360000 |
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Vectron International, 267 Lowell Rd, Hudson NH 03051-4916
Tel: 1-88-VECTRON-1
Web: www.vectron.com
Page 1 of 14
Rev: 26Aug2008
TRU050
Complete VCXO based Phase-Locked Loop
The TRU050, VCXO based PLL
Features
Output Frequencies to 65.536 MHz
5.0 V or 3.3Vdc Operation
Tri-State Output
Holdover on Loss of Signal Alarm
VCXO with CMOS Outputs
0/70° or –40/85°C Temperature Range
Ceramic SMD Package
RoHS/Lead Free Compliant
Description
The VI TRU050 is a user-configurable crystal-based
PLL integrated circuit. It includes a digital phase
detector, op-amp, VCXO and additional integrated
functions for use in digital synchronization
applications. Loop filter software is available as well
SPICE models for circuit simulation.
Applications
Frequency Translation
Clock Smoothing
NRZ Clock Recovery
DSLAM, ADM, ATM, Aggregation, Optical
Switching/Routing, Base Station
Low Jitter PLL’s
Figure 1. TRU050 Block Diagram
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TRU050-TFCGA-27M0000000 | PHASE LOCKED LOOP, CDIP16 |
| TRU050-TFCGA-47M4570000 | PHASE LOCKED LOOP, CDIP16 |
| TRU050-TFLGA-65M5360000 | PHASE LOCKED LOOP, CDIP16 |
| TRU050-TFLHA-18M4320000 | PHASE LOCKED LOOP, CDIP16 |
| TRU050-TGCHA-16M1280000 | PHASE LOCKED LOOP, CDIP16 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TRU050-TELNB-65M0000000 | 制造商:VECTRON 制造商全稱:Vectron International, Inc 功能描述:Complete VCXO based Phase-Locked Loop |
| TRU050-TFCCA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE DROP IN QUARTZ STABILIZED PLL SOLUTUION |
| TRU050-TFCFA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE DROP IN QUARTZ STABILIZED PLL SOLUTUION |
| TRU050-TFCGA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE DROP IN QUARTZ STABILIZED PLL SOLUTUION |
| TRU050-TFCGA-1M0000000 | 制造商:VECTRON 制造商全稱:Vectron International, Inc 功能描述:Complete VCXO based Phase-Locked Loop |
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