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參數(shù)資料
| 型號(hào)： | TRU050-TDLHA49.408-3.088 |
| 廠商： | VECTRON INTERNATIONAL |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PHASE LOCKED LOOP, CDIP16 |
| 封裝： | HERMETIC SEALED, CERAMIC, DIP-16 |
| 文件頁數(shù)： | 7/17頁 |
| 文件大?。?/td> | 627K |
| 代理商： | TRU050-TDLHA49.408-3.088 |
If the DATAIN input to the phase detector is a clock signal, the VCXO, or the divided VCXO output fed back to CLKIN, must
be twice the DATAIN rate. In figure 20, the 2.048 MHz system reference clock can be treated as a 4.096 MHz NRZ data
stream with a data density of 100%. Therefore, the feedback frequency in the PLL would be 4.096 MHz (the 32.768
MHz clock frequency divided by 8).
Vectron International 166 Glover Avenue, Norwalk, CT 06856-5160 Tel: 1-88-VECTRON-1 e-mail: vectron@vectron.com
Figure 20.
Figure 21.
Figure 22.
Another example would be to translate 8.000 kHz to 51.840 MHz.
15 of 17
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TRU050-TDLHA-65M0000000 | 制造商:VECTRON 制造商全稱:Vectron International, Inc 功能描述:Complete VCXO based Phase-Locked Loop |
| TRU050-TDLHB-1M0000000 | 制造商:VECTRON 制造商全稱:Vectron International, Inc 功能描述:Complete VCXO based Phase-Locked Loop |
| TRU050-TDLHB-65M0000000 | 制造商:VECTRON 制造商全稱:Vectron International, Inc 功能描述:Complete VCXO based Phase-Locked Loop |
| TRU050-TDLNA-1M0000000 | 制造商:VECTRON 制造商全稱:Vectron International, Inc 功能描述:Complete VCXO based Phase-Locked Loop |
| TRU050-TDLNA-65M0000000 | 制造商:VECTRON 制造商全稱:Vectron International, Inc 功能描述:Complete VCXO based Phase-Locked Loop |
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