參數(shù)資料
型號(hào)： TRF7960RHBR
廠商： TEXAS INSTRUMENTS INC
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQCC32
封裝： 5 X 5 MM, GREEN, PLASTIC, QFN-32
文件頁(yè)數(shù)： 51/52頁(yè)
文件大?。?/td> 1023K
代理商： TRF7960RHBR
SLOU186F – AUGUST 2006 – REVISED AUGUST 2010
www.ti.com
4.4
ELECTRICAL CHARACTERISTICS
over temperature range VS = 5 V (unless otherwise noted)
TYP
–40°C
PARAMETER
CONDITIONS
MIN/
25°C
TO
UNIT
MAX
110°C
IPD
Supply current in power-down mode
All systems disabled, including supply-voltage regulators
1
10
mA
MAX
The reference voltage generator and the VDD_X remain
IPD2
Supply current in power-down mode 2
120
300
mA
MAX
active to support external circuitry.
Oscillator running, supply-voltage regulators in
ISTBY
Supply current in standby mode
1.5
4
mA
MAX
low-consumption mode
Supply current without antenna driver
Oscillator, regulators, Rx and AGC, are all active. Tx is
ION1
10
16
mA
MAX
current
off.
Supply current with antenna driver
Oscillator, regulators, Rx, AGC, and Tx are all active.
ION2
70
mA
MAX
current
Pout = 100 mW.
Supply current with antenna driver
Oscillator, regulators, Rx, AGC, and Tx are all active.
ION3
120
mA
MAX
current
Pout = 200 mW.
1.4
MIN
BG
Band Gap voltage
Internal analog reference voltage
1.6
V
1.7
MAX
1.4
MIN
VPOR
Power on reset voltage (POR)
2
V
2.5
MAX
3.1
MIN
VDD_A
Regulated supply for analog circuitry
3.5
V
3.8
MAX
4
MIN
VDD_RF
Regulated supply for RF circuitry
Regulator set for 5-V system with 250-mV difference.
4.6
V
5.2
MAX
3.1
MIN
VDD_X
Regulated supply for external circuitry
3.4
V
3.8
MAX
The difference between the external supply and the
Rejection of external supply noise on
PPSRR
regulated voltage is higher than 250 mV. Measured at
26
20
dB
MIN
the supply VDD_RF regulator
212 kHz.
Half-power mode
8
12
MAX
RRFOUT
PA driver output resistance
Full- power mode
4
6
MAX
5
MIN
RRFIN
RX_IN1 and RX_IN2 input resistance
10
k
20
MAX
VRFIN
Maximum input voltage
At RX_IN1 and RX_IN2 inputs
3.5
VPP
MAX
fSUB-CARRIER = 424 kHz
1.2
2.5
mVPP
MAX
VSENS
Input sensitivity
fSUB-CARRIER = 848 kHz
1.2
3
mVPP
MAX
tSET_PD
Set up time after power down
10
20
ms
MAX
tSET_STBY
Set up time after standby mode
30
100
ms
MAX
Recovery time after modulation
tREC
Modulation signal: sine, 424-kHz, 10-mVpp
60
ms
MAX
(ISO14443)
30
MIN
fSYS_CLK
SYS_CLK frequency
In PD2 mode EN = 0 and EN2 = 1
60
kHz
120
MAX
CLKMAX
Maximum CLK frequency
2
MHz
TYP
VIL
Input logic low
0.2
VDD_I/O
MAX
VIH
Input logic high
0.8
VDD_I/O
MIN
ROUT
Output resistance I/O_0 to I/O_7
low_io = H for VDD_I/O < 2.7 V
400
800
MAX
RSYS_CLK
Output resistance SYS_CLK
low_io = H for VDD_I/O < 2.7 V
200
400
MAX
8
ELECTRICAL SPECIFICATIONS
Copyright 2006–2010, Texas Instruments Incorporated
Product Folder Link(s): TRF7960 TRF7961
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