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參數(shù)資料
| 型號： | TRCV0110G |
| 英文描述： | ATM/SONET DEMULTIPLEXER|BIPOLAR|BGA|177PIN|PLASTIC |
| 中文描述： | 的ATM / SONET的分路器|雙極|的BGA | 177PIN |塑料 |
| 文件頁數(shù)： | 1/26頁 |
| 文件大?。?/td> | 476K |
| 代理商： | TRCV0110G |
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Data Sheet
March 28, 2002
TRCV0110G 10 Gbits/s Limiting Amplifier
Clock Recovery, 1:16 Data Demultiplexer
Features
I
Integrated limiting amplifier with 8 mV sensitivity at
1 x 10
–10
bit error rate (BER)
I
Integrated clock recovery and 1:16 data demulti-
plexer (deMUX)
I
Supports standard OC-192/STM-64 data rate of
9.9532 Gbits/s up through forward error correction
(FEC) rate of 10.709 Gbits/s as well as Ethernet
rate of 10.3 Gbits/s
I
Single 3.3 V power supply
I
Additional high-speed data input for system loop-
back operation
I
Standard low-voltage differential signaling (LVDS)
deMUX data and clock outputs
I
CMOS I/Os compatible with LVTTL signaling
I
Available in a 177-ball CBGA package
I
Jitter tolerance compliant with the following:
—
Telcordia Technologies
GR-253 CORE
—ITU-T G.825
—ITU-T G.958
Applications
I
SONET/SDH optical modules
I
SONET/SDH line termination equipment
I
SONET/SDH test equipment
I
Ethernet 10 Gbit physical layer applications
Description
The Agere Systems Inc. TRCV0110G device
integrates a limiting amplifier combined with a clock
recovery circuit that feeds a data deMUX for use in
10 Gbits/s high-speed communications systems.
Additional features include an auxiliary clock output
and a reference clock input that can be either divided
by 16 or divided by 64. The TRCV0110G can be
operated within the standard OC192/STM64 data
rate of 9.9532 GHz and the FEC rate of 10.7092
Gbits/s.
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