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參數(shù)資料
| 型號(hào)： | TRAC-S2 |
| 廠商： | Zetex Semiconductor |
| 英文描述： | TRAC SUPPORT CIRCUIT |
| 中文描述： | 支持線路的TRAC |
| 文件頁(yè)數(shù)： | 3/8頁(yè) |
| 文件大?。?/td> | 202K |
| 代理商： | TRAC-S2 |
ELECTRICAL CHARACTERISTICS
Test Conditions: Temperature=25°C, VDD=5V, VSS=0V, CLCR_IN=0V,
100nF between AGND_OUT and VSS, unless otherwise stated.
DATA_OUT(Frequency)
2.2nF between CAP and VSS
CLCR_IN = 5V
1.7kHz
2.5kHz
4.0kHz
DATA_OUT(High output
voltage)
2.2nF between CAP and VSS
CLCR_IN = 5V
3.90V
4.10V
4.50V
SELECT
(Output Voltage)
2.2nF between CAP and VSS
CLCR_IN = 5V
4.8V
4.99V
5.00V
DESCRIPTION OF PIN FUNCTIONS
Inputs
SETV
Defines the AGND_OUT voltage. Normally set by potential divider
CLCR_IN
Active high to enable clock
CAP
Capacitor to VSS sets clock frequency
Outputs
AGND_OUT
Analog Ground. Able to source and sink current
SELECT
Active high when CLCR_IN is logic high. Enables memory device
CLK_OUT
Fed to EEPROM clock input
NOT CLK_OUT
Fed to TRAC clock input
DATA_OUT
CLK_OUT divided by four. Fed to serial output memory device
RESET_OUT
Reset for TRAC Support Circuit and TRAC devices
General notes for the TRAC Support Circuit
Anon-chiposcillatorproducestheoutputCLK_OUTandNOTCLK_OUT.CLCR_INmustbelogichigh
(VDD) to activate CLK_OUT and NOT CLK_OUT
TheCLK_OUToutputfrequencyisdividedbyfourtogivetheDATA_OUToutput. ThereforeCLCR_IN
must be logic high (VDD) to activate DATA_OUT
For AGND_OUT stability under load, a100nFcapacitor isrequired between AGND_OUT and VSS
TRAC-S2
3
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