參數(shù)資料
型號(hào)： TPU3040PQ
元件分類： 圖文
英文描述： TELETEXT DECODER, PQCC44
封裝： PLASTIC, LCC-44
文件頁數(shù)： 36/72頁
文件大?。?/td> 347K
代理商： TPU3040PQ
TPU 3035, TPU 3040, TPU 3050
PRELIMINARY DATA SHEET
41
Micronas
Note:
If not otherwise designated, all parameters in the following table are specified as single bytes. As write parame-
ter magazine numbers 8 and 0 have the same meaning, as read parameter the magazine number is a true 4-bit
number (e.g. magazine 8 = 00001000). For write parameters the values in parentheses indicate default values
after reset (in hex notation). For compatibility reasons every undefined bit in a write parameter should be set to
‘0’. Undefined bits in a read parameter should be treated as “don’t care”.
Table 4–20: Command Codes
Code
Function
Write Parameter
Read Parameter
Notes
Operational & Test Commands
00
Dummy
no action
01
Reset
software reset of 65C02
02
Escape
escape to other codes
03
Version
CPU pointer high
CPU pointer low
show version in OSD layer
CPU pointer to text in ROM
04
Test
reserved for testing
05
Test
reserved for testing
06
DRAM Mode
dram mode
(06)
flash inc
(05)
control enable
(FF)
dram mode = I/O page register 028EH
flash freq = flash inc / (256 * 0.00324)
control enable:
bit0 = C4 erase page
bit1 = C5 news flash
bit2 = C6 subtitle
bit3 = C7 suppress header
bit4 = C8 update indicator
bit5 = C9 interrupted sequence
bit6 = C10 inhibit display
bit7 = C11 magazine parallel
07
Acquisition Mode
acquisition mode
(00)
init subcode high
(FF)
init subcode low
(FF)
gain max
(1F)
filter max
(1F)
gain
filter
acquisition mode:
bit0 = no slicer adaption
bit1 = no bit error in framing code
bit2 = limit slicer adaption
init subcode:
automatic subcode request after
page table reset
gain max:
only used if bit2 = 1
filter max:
only used if bit2 = 1
Memory Management Commands
14
Read DRAM Size
dram size high
dram size low
dram mode
dram size:
0080H = 256Kbit
(slow mode)
0200H = 1Mbit
(fast mode)
0800H = 4Mbit
(fast mode)
2000H = 16Mbit
(fast mode)
dram mode:
(only in TPU 3050)
see I/O page register 028EH
25
Page Memory
dram bank
(00)
dram high
(40)
start of page memory
execute page table reset
27
Page Table Reset
reset page table
reset ghost row status
reset data service status
reset cycle count
reset memory count
reset ghost count
reset priorities
clear rolling header
clear VPS data
clear WSS data
42
Reset Ghost Row Status
ghost row status:
bit0 = row 24 in cycle
bit1 = row 25 in cycle
bit2 = row 26 in cycle
bit3 = row 27 in cycle
bit4 = row 28 in cycle
bit5 = row 29 in cycle
bit6 = row 30 in cycle
bit7 = row 31 in cycle
相關(guān)PDF資料
PDF描述
TPU3040PK TELETEXT DECODER, PDIP40
TPU3040PO TELETEXT DECODER, PDIP52
TPU3040PQ TELETEXT DECODER, PQCC44
TPU3050PO TELETEXT DECODER, PDIP52
TQ6122-D PARALLEL, 8 BITS INPUT LOADING, 0.002 us SETTLING TIME, 8-BIT DAC, UUC60
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