
TPU 3035, TPU 3040, TPU 3050
PRELIMINARY DATA SHEET
61
Micronas
026F H
Write
DISPLAY MODE 3
Bit
Reset
Function
7
1
1 = 10 pixel/character
0 = 8 pixel/character
6
0
1 = double dot size in vertical direction
(OSD layer only)
0 = normal dot size in vertical direction
5
0
1 = double dot size in horizontal direction
(OSD layer only)
0 = normal dot size in horizontal direction
4
0
1 = black colors replaced by transparent & shadow
(OSD layer only)
0 = black colors displayed black
3 to 0
F H
4-bit value defining delay of horizontal start for both layers (in pixel)
delay = mod16 (character_width – 2 – value)
(leftmost position should not be used!)
0270 H
Write
DISPLAY MODE 4
Bit
Reset
Function
2
0
1 = boxing enable
0 = boxing disable
1
0
1 = reveal enable
0 = reveal disable
0
This bit is taken as flash clock for the WST layer, the frequency should be around 6 Hz.
0273 H
Write
DISPLAY MODE 5
Bit
Reset
Function
4
0
WST layer scan line counter preset (LSB for zoom mode)
3 to 0
0
WST layer scan line counter preset
0280 H
0283 H
0286 H
0289 H
R/W
DRAM DISPLAY POINTER LOW
DRAM SLICER POINTER LOW
DRAM CPU WRITE POINTER LOW
DRAM CPU READ POINTER LOW
Bit
Reset
Function
7 to 0
–
8 least significant bits of 21 bit address pointer
12 LSBs of 21 bit address pointer are running with autoincrement
read value is only specified when pointer is not incrementing
0281 H
0284 H
0287 H
028A H
R/W
DRAM DISPLAY POINTER MEDIUM
DRAM SLICER POINTER MEDIUM
DRAM CPU WRITE POINTER MEDIUM
DRAM CPU READ POINTER MEDIUM
Bit
Reset
Function
all
–
8 medium bits of 21 bit address pointer
12 LSBs of 21 bit address pointer are running with autoincrement
read value is only specified when pointer is not incrementing
writing this register clears all lower bits of related pointer