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參數(shù)資料
| 型號： | TPSV477M010R0060 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 60-A, 3.3/5-V INPUT, NONISOLATED WIDE-OUTPUT ADJUST POWER MODULE |
| 中文描述： | 60甲，3.3/5-V輸入，非隔離寬輸出調(diào)節(jié)電源模塊 |
| 文件頁數(shù)： | 17/24頁 |
| 文件大?。?/td> | 947K |
| 代理商： | TPSV477M010R0060 |
www.ti.com
PTH04040W
SLTS238A–SEPTEMBER 2005–REVISED FEBRUARY 2006
To coordinate a power-up sequence the
Track
control must first pulled to ground potential. This should be done
at or before input power is applied to the modules. The ground signal should be maintained for at least 10 ms
after input power has been applied. This brief period gives the modules time to complete their internal soft-start
initialization, enabling them to produce an output voltage. A low-cost supply voltage supervisor IC, that includes
built-in time delay, is an ideal component for automatically controlling the
Track
inputs at power up.
Figure 15
shows how the TPS3808G50 supply voltage supervisor IC (U3) can be used to coordinate the
sequenced power-up of two 5-V input Auto-Track modules. The output of the TPS3808 supervisor becomes
active above an input voltage of 0.8 V, enabling it to assert a ground signal to the common
Track
control well
before the input voltage has reached the module’s undervoltage lockout threshold. The ground signal is
maintained until approximately 27 ms after the input voltage has risen above U3’s voltage threshold, which is
4.65 V. The 27-ms time period is controlled by the capacitor C3. The value of 4700
μ
F provides sufficient time
delay for the modules to complete their internal soft-start initialization. The output voltage of each module
remains at zero until the
Track
control voltage is allowed to rise. When U3 removes the ground signal, the
Track
control voltage automatically rises to the input voltage. This causes the output voltage of each module to rise
simultaneously with the other modules, until each reaches its respective set-point voltage.
Figure 15
shows the output voltage waveforms from the circuit of
Figure 16
after input voltage is applied to the
circuit. The waveforms, V
1 and V
O
2, represent the output voltages from the two power modules, U1 (3.3 V) and
U2 (1.8 V), respectively. V
TRK
, V
O
1, and V
O
2 are shown rising together to produce the desired simultaneous
power-up characteristic.
The same circuit also provides a power-down sequence. When the input voltage falls below U3's voltage
threshold, the ground signal is re-applied to the common
Track
control. This pulls the
Track
inputs to zero volts,
forcing the output of each module to follow, as shown in
Figure 17
. In order for a simultaneous power-down to
occur, the
Track
inputs must be pulled low before the input voltage has fallen below the modules' undervoltage
lockout. This is an important constraint. Once the modules recognize that a valid input voltage is no longer
present, their outputs can no longer follow the voltage applied at their
Track
input. During a power-down
sequence, the fall in the output voltage from the modules is limited by the maximum output capacitance and the
Auto-Track slew rate.
17
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