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APPLICATION INFORMATION
Feedback Capacitor Requirements
(TPS79901 only)
The feedback capacitor, C
FB
, shown in
Figure 29
is
required for stability. For a parallel combination of R
1
and R
2
equal to 250k
, any value from 3pF to 1nF
can be used. Fixed voltage versions have an internal
30pF feedback capacitor which is quick-charged at
start-up. The adjustable version does not have this
quick-charge circuit, so values below 5pF should be
used to ensure fast startup; values above 47pF can
be used to implement an output voltage soft-start.
Larger value capacitors also improve noise slightly.
The TPS79901 is stable in unity-gain configuration
(OUT tied to FB) without C
FB
.
Output Noise
In most LDOs, the bandgap is the dominant noise
source. If a noise reduction capacitor (C
NR
) is used
with the TPS799xx, the bandgap does not contribute
significantly to noise. Instead, noise is dominated by
the output resistor divider and the error amplifier
input. To minimize noise in a given application, use a
0.01
μ
F noise reduction capacitor; for the adjustable
version, smaller value resistors in the output resistor
divider reduce noise. A parallel combination that
gives 2
μ
A of divider current will have the same noise
performance as a fixed voltage version. To further
optimize noise, equivalent series resistance of the
output capacitor can be set to approximately 0.2
.
This configuration maximizes phase margin in the
control loop, reducing total output noise by up to
10%.
Input and Output Capacitor Requirements
Although an input capacitor is not required for
stability, it is good analog design practice to connect
a 0.1
μ
F to 1
μ
F low ESR capacitor across the input
supply
near
the
regulator.
reactive
input
sources
response, noise rejection, and ripple rejection. A
higher-value capacitor may be necessary if large, fast
rise-time load transients are anticipated or the device
is located several inches from the power source. If
source impedance is not sufficiently low, a 0.1
μ
F
input capacitor may be necessary to ensure stability.
TPS79901
GND
EN
FB
IN
OUT
V
IN
V
OUT
R
1
C
FB
R
2
Optional input capacitor.
May improve source
impedance, noise, or PSRR.
V
=
OUT
′
1.193
(R
1
2
+ R )
R
2
V
EN
2.2 F
Ceramic
TPS799xx
GND
EN
NR
IN
OUT
V
IN
V
OUT
Optional input capacitor.
May improve source
impedance, noise, or PSRR.
Optional bypass capacitor
to reduce output noise
and increase PSRR.
2.2
m
F
Ceramic
V
EN
TPS799xx
SBVS056I–JANUARY 2005–REVISED NOVEMBER 2007
The TPS799xx family of LDO regulators combines
the high performance required of many RF and
precision analog applications with ultra-low current
consumption. High PSRR is provided by a high gain,
high bandwidth error loop with good supply rejection
at very low headroom (V
IN
– V
OUT
). Fixed voltage
versions provide a noise reduction pin to bypass
noise generated by the bandgap reference and to
improve PSRR while a quick-start circuit fast-charges
this capacitor at startup. The combination of high
performance and low ground current also make the
TPS799xx
an
excellent
applications.
All
versions
over-current protection and are fully specified from
–40
°
C to +125
°
C.
Figure 28
shows the basic circuit connections for
fixed voltage models.
Figure 29
gives the connections
for the adjustable output version (TPS79901). R
1
and
R
2
can be calculated for any output voltage using the
formula in
Figure 29
. Sample resistor values for
common output voltages are shown in
Figure 29
.
choice
have
for
thermal
portable
and
This
will
counteract
transient
and
improve
space
The TPS799xx is designed to be stable with standard
ceramic capacitors of values 2.2
μ
F or larger. X5R
and X7R type capacitors are best as they have
minimal variation in value and ESR over temperature.
Maximum ESR should be < 1.0
.
space
space
space
Figure 29. Typical Application Circuit for
Adjustable Voltage Version
Figure 28. Typical Application Circuit for
Fixed Voltage Versions
10
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