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參數(shù)資料
| 型號(hào)： | TPS79901DDC |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 200mA, Low Quiescent Current, Ultra-Low Noise, High PSRR Low Dropout Linear Regulator |
| 中文描述： | 200mA的，低靜態(tài)電流，超低噪聲，高PSRR低壓降線性穩(wěn)壓器 |
| 文件頁數(shù)： | 11/21頁 |
| 文件大小： | 453K |
| 代理商： | TPS79901DDC |
www.ti.com
Startup
Fixed voltage versions of the TPS799xx use a
quick-start circuit to fast-charge the noise reduction
capacitor, C
NR
, if present (see
Functional Block
Diagrams
,
Figure 1
). This allows the combination of
very low output noise and fast start-up times. The
NR pin is high impedance so a low leakage C
NR
capacitor must be used; most ceramic capacitors are
appropriate in this configuration.
V = 10.5 V
V
OUT
RMS
(1)
Board Layout Recommendations to Improve
PSRR and Noise Performance
To improve ac performance such as PSRR, output
noise, and transient response, it is recommended
that the board be designed with separate ground
planes for V
IN
and V
OUT
, with each ground plane
connected only at the GND pin of the device. In
addition, the ground connection for the bypass
capacitor should connect directly to the GND pin of
the device.
Transient Response
As with any regulator, increasing the size of the
output
capacitor
will
magnitude but increase duration of the transient
response. In the adjustable version, adding C
FB
between OUT and FB will improve stability and
transient response. The transient response of the
TPS799xx is enhanced by an active pull-down that
engages
when
the
approximately 5% or more when the device is
enabled.
When
enabled,
behaves like a 350
resistor to ground.
Internal Current Limit
The TPS799xx internal current limit helps protect the
regulator during fault conditions. During current limit,
the output will source a fixed amount of current that
is largely independent of output voltage. For reliable
operation, the device should not be operated in
current limit for extended periods of time.
Under-Voltage Lock-Out (UVLO)
The TPS799xx utilizes an under-voltage lock-out
circuit to keep the output shut off until internal
circuitry is operating properly. The UVLO circuit has
a de-glitch feature so that it will typically ignore
undershoot transients on the input if they are less
than 50
μ
s duration.
Shutdown
The enable pin (EN) is active high and is compatible
with standard and low voltage TTL-CMOS levels.
When shutdown capability is not required, EN can be
connected to IN.
Minimum Load
The TPS799xx is stable and well-behaved with no
output load. To meet the specified accuracy, a
minimum load of 500
μ
A is required. Below 500
μ
A at
junction temperatures near +125
°
C, the output can
drift up enough to cause the output pull-down to turn
on. The output pull-down will limit voltage drift to 5%
typically but ground current could increase by
approximately 50
μ
A. In typical applications, the
junction cannot reach high temperatures at light
loads since there is no appreciable dissipated power.
The specified ground current would then be valid at
no load in most applications.
Dropout Voltage
The TPS799xx uses a PMOS pass transistor to
achieve low dropout. When (V
IN
– V
OUT
) is less than
the dropout voltage (V
DO
), the PMOS pass device is
in
its
linear
region
input-to-output resistance is the R
DS, ON
of the PMOS
pass element. Because the PMOS device behaves
like a resistor in dropout, V
DO
will approximately
scale with output current.
TPS799xx
SBVS056G–JANUARY 2005–REVISED AUGUST 2006
Noise can be referred to the feedback point (FB pin)
such
that
with
C
=
approximately given by
Equation 1
:
0.01
μ
F
total
noise
is
The TPS79901 adjustable version does not have the
noise-reduction pin available, so ultra-low noise
operation is not possible. Noise can be minimized
according to the above recommendations.
Note that for fastest startup, V
IN
should be applied
first, then the enable pin (EN) driven high. If EN is
tied to IN, startup will be somewhat slower. Refer to
Figure
25
and
Figure
Characteristics
section. The quick-start switch is
closed for approximately 135
μ
s. To ensure that C
NR
is fully charged during the quick-start time, a 0.01
μ
F
or smaller capacitor should be used.
26
in
the
Typical
reduce
over/undershoot
output
overshoots
by
the
pull-down
device
The PMOS pass element in the TPS799xx has a
built-in body diode that conducts current when the
voltage at OUT exceeds the voltage at IN. This
current is not limited, so if extended reverse voltage
operation is anticipated, external limiting may be
appropriate.
of
operation
and
the
As with any linear regulator, PSRR and transient
response are degraded as (V
IN
– V
OUT
) approaches
dropout. This effect is shown in
Figure 18
through
Figure 20
in the
Typical Characteristics
section.
11
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| TPS79901DDCR | 功能描述:低壓差穩(wěn)壓器 - LDO 200mA High PSRR LDO RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| TPS79901DDCRG4 | 功能描述:低壓差穩(wěn)壓器 - LDO 200mA High PSRR LDO RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| TPS79901DDCT | 功能描述:低壓差穩(wěn)壓器 - LDO 200mA High PSRR LDO RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| TPS79901DDCTG4 | 功能描述:低壓差穩(wěn)壓器 - LDO 200mA High PSRR LDO RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| TPS79901DRVR | 功能描述:低壓差穩(wěn)壓器 - LDO 200mA High PSRR LDO RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
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