參數(shù)資料
型號: TPS77427DGK
廠商: Texas Instruments, Inc.
英文描述: 250-mA LDO REGULATORS WITH INTEGRATED RESET OR PG
中文描述: 250毫安LDO穩(wěn)壓器與集成復(fù)位或PG
文件頁數(shù): 18/23頁
文件大小: 355K
代理商: TPS77427DGK
TPS77301, TPS77318, TPS77327, TPS77328, TPS77333 WITH RESET OUTPUT
TPS77401, TPS77418, TPS77427, TPS77428, TPS77433 WITH POWER GOOD OUTPUT
250-mA LDO REGULATORS WITH INTEGRATED RESET OR PG
SLVS281A – FEBRUARY 2000 – REVISED MARCH 2000
18
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
Figure 22 shows the output capacitor and its parasitic impedances in a typical LDO output stage.
LDO
V
in
V
ESR
I
out
R
ESR
C
out
R
LOAD
V
out
+
Figure 22. – LDO Output Stage With Parasitic Resistances ESR and ESL
In steady state (dc state condition), the load current is supplied by the LDO (solid arrow) and the voltage across
the capacitor is the same as the output voltage (V
Cout
= V
out)
. This means no current is flowing into the C
out
branch. If I
out
suddenly increases (transient condition), the following occurs;
The LDO is not able to supply the sudden current need due to its response time (t
1
in Figure 23). Therefore,
capacitor C
out
provides the current for the new load condition (dashed arrow). C
out
now acts like a battery with
an internal resistance, ESR. Depending on the current demand at the output, a voltage drop will occur at R
ESR
.
This voltage is shown as V
ESR
in Figure 22.
When C
out
is conducting current to the load, initial voltage at the load will be V
out
= V
Cout
– V
ESR
. Due to the
discharge of C
out
, the output voltage V
out
will drop continuously until the response time t
1
of the LDO is reached
and the LDO will resume supplying the load. From this point, the output voltage starts rising again until it reaches
the regulated voltage. This period is shown as t
2
in Figure 23.
The figure also shows the impact of different ESRs on the output voltage. The left brackets show different levels
of ESRs where number 1 displays the lowest and number 3 displays the highest ESR.
From above, the following conclusions can be drawn:
The higher the ESR, the larger the droop at the beginning of load transient.
The smaller the output capacitor, the faster the discharge time and the bigger the voltage droop during the
LDO response period.
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