參數(shù)資料
型號： TPS7348Y
廠商： Texas Instruments, Inc.
元件分類： 基準電壓源/電流源
英文描述： LOW-DROPOUT VOLTAGE REGULATORS WITH INTEGRATED DELAYED RESET FUNCTION
中文描述： 低技術，集成延遲復位功能降穩(wěn)壓器
文件頁數(shù)： 14/43頁
文件大小： 638K
代理商： TPS7348Y
TPS7301Q, TPS7325Q, TPS7330Q, TPS7333Q, TPS7348Q, TPS7350Q
LOW-DROPOUT VOLTAGE REGULATORS
WITH INTEGRATED DELAYED RESET FUNCTION
SLVS124F – JUNE 1995 – REVISED JANUARY 1999
14
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
switching characteristics
PARAMETER
TEST CONDITIONS
TJ
TPS7301Q, TPS7333Q
TPS7348Q, TPS7350Q
UNIT
MIN
140
100
TYP
200
MAX
260
300
RESET time out delay
RESET time-out delay
See Figure 5
25
°
C
ms
–40
°
C to 125
°
C
electrical characteristics at I
O
= 10 mA, EN = 0 V, C
o
= 4.7
μ
F (CSR
= 1
), T
J
= 25
°
C, SENSE/FB
shorted to OUT (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TPS7301Y, TPS7333Y
TPS7348Y, TPS7350Y
UNIT
MIN
TYP
MAX
Ground current (active mode)
EN
≤
0.5 V,
0 mA
≤
IO
≤
500 mA
EN = VI,
VO = 0 V,
EN = VI,
Normal operation,
VI = VO + 1 V,
340
μ
A
Input current (standby mode)
2.7 V
≤
VI
≤
10 V
VI = 10 V
2.7 V
≤
VI
≤
10 V
V at RESET = 10 V
0.01
μ
A
Output current limit
1.2
A
Pass-element leakage current in standby mode
0.01
μ
A
RESET leakage current
0.02
μ
A
°
C
Thermal shutdown junction temperature
165
EN logic low (active mode)
2.7 V
≤
VI
≤
10 V
0.5
V
EN hysteresis voltage
50
mV
EN input current
0 V
≤
VI
≤
10 V
0.001
μ
A
Minimum VI for active pass element
Minimum VI for valid RESET
CSR (compensation series resistance) refers to the total series resistance, including the equivalent series resistance (ESR) of the capacitor, any
series resistance added externally, and PWB trace resistance to Co.
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
2.05
V
IO(RESET) = –300
μ
A
1
V
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