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參數資料
| 型號： | TPS715 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 50 mA, 24 V, 3.2 uA Supply Current Low-Dropout Linear Regulator |
| 中文描述： | 50毫安，24伏，3.2微安電源電流低壓差線性穩(wěn)壓器 |
| 文件頁數： | 2/14頁 |
| 文件大小： | 294K |
| 代理商： | TPS715 |
www.ti.com
ABSOLUTE MAXIMUM RATINGS
over operating temperature range (unless otherwise noted)
(1)(2)
DISSIPATION RATING TABLE
TPS715xx
SLVS338L–MAY 2001–REVISED SEPTEMBER 2005
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
PRODUCT
TPS715
xx
yyy
z
V
OUT(2)
XX
is nominal output voltage (for example, 28 = 2.8V, 285 = 2.85V, 01 = Adjustable).
YYY
is package designator.
Z
is package quantity.
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at
.(2)
UNIT
V
IN
range
Peak output current
ESD rating, HBM
ESD rating, CDM
Continuous total power dissipation
Junction temperature range, T
J
Storage temperature range, T
stg
-0.3 V to 24 V
Internally limited
2 kV
500 V
See Dissipation Rating Table
-40°C to +150°C
-65°C to +150°C
(1)
Stresses beyond those listed under
absolute maximum ratings
may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under
recommended operating
conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
(2)
DERATING FACTOR
ABOVE T
A
= 25°C
2.52 mW/°C
3.18 mW/°C
T
≤
25°C
POWER RATING
250 mW
320 mW
T
= 70°C
POWER RATING
140 mW
175 mW
T
= 85°C
POWER RATING
100 mW
130 mW
BOARD
PACKAGE
R
θ
JC
°C/W
R
θ
JA
°C/W
Low-K
(1)
High-K
(2)
DCK
DCK
165
165
395
315
(1)
The JEDEC Low-K (1s) board design used to derive this data was a 3 inch x 3 inch, two-layer board with 2 ounce copper traces on top
of the board.
The JEDEC High-K (2s2p) board design used to derive this data was a 3 inch x 3 inch, multilayer board with 1 ounce internal power and
ground planes and 2 ounce copper traces on top and bottom of the board.
(2)
2
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