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參數(shù)資料
| 型號： | TPS70751PWP |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 線性穩(wěn)壓 |
| 英文描述： | DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS WITH POWER UP SEQUENCING FOR SPLIT VOLTAGE DSP SYSTEMS |
| 中文描述： | 兩用低壓差最多可劈開電壓DSP系統(tǒng)序列電源電壓穩(wěn)壓器的輸出 |
| 文件頁數(shù)： | 12/34頁 |
| 文件大小： | 505K |
| 代理商： | TPS70751PWP |
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TPS70745, TPS70748, TPS70751, TPS70758, TPS70702
DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS
WITH POWER UP SEQUENCING FOR SPLIT VOLTAGE DSP SYSTEMS
SLVS291 – MAY 2000
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description (continued)
The TPS707xx family of voltage regulators offers very low dropout voltage and dual outputs with power up
sequence control, which is designed primarily for DSP applications. These devices have extremely low noise
output performance without using any added filter bypass capacitors and are designed to have a fast transient
response and be stable with 10 uF low ESR capacitors.
These devices have fixed 3.3-V/2.5-V, 3.3-V/1.8-V, 3.3-V/1.5-V, 3.3-V/1.2-V, and adjustable/adjustable voltage
options. Regulator 1 can support up to 250 mA and regulator 2 can support up to 125 mA. Separate voltage
inputs allow the designer to configure the source power.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 83 mV
on regulator 1) and is directly proportional to the output current. Additionally, since the PMOS pass element is
a voltage-driven device, the quiescent current is very low and independent of output loading (maximum of
230
A over the full range of output current). This LDO family also features a sleep mode; applying a high signal
to EN (enable) shuts down both regulators, reducing the input current to 1
A at TJ = 25°C.
The device is enabled when the EN pin is connected to a low-level input voltage. The output voltages of the two
regulators are sensed at the VSENSE1 and VSENSE2 pins respectively.
The input signal at the SEQ pin controls the power-up sequence of the two regulators. When the device is
enabled and the SEQ terminal is pulled high or left open, VOUT2 will turn on first and VOUT1 will remain off until
VOUT2 reaches approximately 83% of its regulated output voltage. At that time VOUT1 will be turned on. If VOUT2
is pulled below 83% (i.e. over load condition) VOUT1 will be turned off. Pulling the SEQ terminal low, reverses
the power-up order and VOUT1 will be turned on first. The SEQ pin is connected to an internal pullup current
source.
For each regulator, there is an internal discharge transistor to discharge the output capacitor when the regulator
is turned off(disabled).
The PG1 pin reports the voltage conditions at VOUT1. Power good can be used to implement a SVS for the
circuitry supplied by regulator 1.
The TPS707xx features a RESET (SVS, POR, or Power On Reset). RESET output initiates a reset in DSP
systems and related digital applications in the event of an undervoltage condition. RESET indicates the status
of VOUT2 and both manual reset pins (MR1 and MR2). When VOUT2 reaches 95% of its regulated voltage and
MR1 and MR2 are in the logic high state, RESET will go to a high impedance state after 120 ms delay. RESET
will go to logic low state when VOUT2 regulated output voltage is pulled below 95% (i.e. over load condition) of
its regulated voltage. To monitor VOUT1 , the PG1 output pin can be connected to MR1 or MR2.
The device has an undervoltage lockout UVLO circuit which prevents the internal regulators from turning on until
VIN1 reaches 2.5V.
AVAILABLE OPTIONS
TJ
REGULATOR 1
VO (V)
REGULATOR 2
VO (V)
TSSOP
(PWP)
3.3 V
1.2 V
TPS70745PWP
3.3 V
1.5 V
TPS70748PWP
–40
°Cto125°C
3.3 V
1.8 V
TPS70751PWP
– 40
°C to 125°C
3.3 V
2.5 V
TPS70758PWP
Adjustable
(1.22 V to 5.5 V)
Adjustable
(1.22 V to 5.5 V)
TPS70702PWP
NOTE: The TPS70702 is programmable using external resistor dividers (see
application information) The PWP package is available taped and reeled. Add
an R suffix to the device type (e.g., TPS70702PWPR).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TPS70751PWPG4 | 功能描述:低壓差穩(wěn)壓器 - LDO Dual-Output LDO RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| TPS70751PWPR | 功能描述:低壓差穩(wěn)壓器 - LDO Dual-Output LDO RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| TPS70751PWPRG4 | 功能描述:低壓差穩(wěn)壓器 - LDO Dual-Output LDO RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| TPS70758 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS WITH POWER UP SEQUENCING FOR SPLIT VOLTAGE DSP SYSTEMS |
| TPS70758PWP | 功能描述:低壓差穩(wěn)壓器 - LDO 3.3V/1.2V 250/125mA RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
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