參數(shù)資料
型號(hào)： TPS65820RSHTG4
廠商： TEXAS INSTRUMENTS INC
元件分類： 電源管理
英文描述： 8-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC56
封裝： 7 X 7 MM, GREEN, PLASTIC, QFN-56
文件頁數(shù)： 60/98頁
文件大?。?/td> 2290K
代理商： TPS65820RSHTG4
GATE
CONTROL
LOGIC
L 1
PGND1
VIN_SM1
SM1
OUT
P1
-
_
+
_
+
_
SET
RESET
OUT
OUTPUT VOLTAGE
COMPARATOR
POWERSTAGEPEAK
CURRENT COMPARATORS
I(L1)
I(L 1)
LSM1
BIASCONTROL
PFMCONTROL SECTION
(SHOWNFORSM1,SAMETOPOLOGY FORSM2)
V(VIN_SM1)
39 W
V(VIN_SM1)
29 W
VO(SM1)
+
3.3 H
m
VO(SM1)
C21
10 F
m
C22
10 F
m
BURST
V
(OUT)
I
PFM(ENTER)
I
PFM(LEAVE)
BURST
INDUCTOR
CURRENT
OUTPUT
VOLTAGE
LOWRIPPLE
PFMOPERATION
MAXIMUMEFFICIENCY
PFMOPERATION
TCOMP
www.ti.com .............................................................................................................................................................. SLVS663B – MAY 2006 – REVISED APRIL 2008
Figure 44. PFM Mode Operation
During burst operation two current comparators control the power stage integrated MOSFETs. These
comparators monitor the instantaneous inductor current and compare it to the internal thresholds IPFM(ENTER) and
IPFM(LEAVE), turning the p-channel switch on if the inductor current is less than IPFM(LEAVE) and turning it off if the
inductor current exceeds IPFM(ENTER). The n-channel switch is turned on when the p-channel MOSFET is off.
The PFM output voltage comparator quiescent current may be reduced using the I2C register bits PFM_RPL1
and PFM_RPL2 in registers SM1_SET and SM2_SET. The voltage comparator quiescent current is reduced if
PFM_RPL1 and PFM_RPL2 bits are set to LO, and the comparator response time (tCOMP, see Figure 45)
increases. A reduction in quiescent current increases the converter efficiency at light loads, at the expense of a
larger output voltage ripple when in PFM mode.
The ripple is minimized if PFM_RPL1 and PFM_RPL2 bits are set to HI, at the expense of reduced efficiency
under light loads. The operation under low and high ripple settings is described in Figure 45.
Figure 45. PFM mode operation waveforms
When a burst of pulses is generated, the PFM current comparators control the power stage MOSFETs to limit
the inductor current to a value between the thresholds IPFM(LEAVE) and IPFM(ENTER). The number of pulses in a
burst cycle is proportional to the load current, and the average current is always below IPFM(LEAVE) once PFM
operation is set. The typical burst operation in PFM mode is shown in Figure 46.
Copyright 2006–2008, Texas Instruments Incorporated
63
Product Folder Link(s): TPS65820
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