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參數(shù)資料
| 型號： | TPS62410DRCTG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 1.6 A DUAL SWITCHING CONTROLLER, 2500 kHz SWITCHING FREQ-MAX, PDSO10 |
| 封裝： | 3 X 3 MM, GREEN, PLASTIC, MLF-10 |
| 文件頁數(shù)： | 23/31頁 |
| 文件大?。?/td> | 1240K |
| 代理商： | TPS62410DRCTG4 |
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ELECTRICAL CHARACTERISTICS
SLVS737 – FEBRUARY 2007
V
IN = 3.6V, VOUT = 1.8V, EN = VIN, MODE = GND, L = 2.2H, COUT = 20F, TA = –40°C to 85°C typical values are at TA =
25
°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY CURRENT
VIN
Input voltage range
2.5
6.0
V
One converter, IOUT = 0mA. PFM mode enabled
19
29
A
(Mode = 0) device not switching,
EN1 = 1 OR EN2 = 1
Two converter, IOUT = 0mA. PFM mode enabled
32
48
A
(Mode = 0) device not switching,
IQ
Operating quiescent current
EN1 = 1 AND EN2 = 1
IOUT = 0mA, MODE/DATA = GND, for one
23
A
converter, VOUT 1.575V(1)
IOUT = 0mA, MODE/DATA = VIN, for one
3.6
mA
converter, VOUT 1.575V (1)
EN1, EN2 = GND, VIN = 3.6V(2)
1.2
3
ISD
Shutdown current
A
EN1, EN2 = GND, VIN ramped from 0V to 3.6V(3)
0.1
1
Falling
1.5
2.35
VUVLO
Undervoltage lockout threshold
V
Rising
2.4
ENABLE EN1, EN2
VIH
High-level input voltage, EN1, EN2
1.2
VIN
V
VIL
Low-level input voltage, EN1, EN2
0
0.4
V
IIN
Input bias current, EN1, EN2
EN1, EN2 = GND or VIN
0.05
1.0
A
DEF_1 INPUT
IIN
Input biasd current DEF_1
DEF_1 = GND or VIN
0.01
1.0
A
MODE/DATA
VIH
High-level input voltage,
1.2
VIN
V
MODE/DATA
VIL
Low-level input voltage,
0
0.4
V
MODE/DATA
IIN
Input bias current, MODE/DATA
MODE/DATA = GND or VIN
0.01
1.0
A
VOH
Acknowledge output voltage high
Open drain, via external pullup resistor
VIN
V
VOL
Acknowledge output voltage low
Open drain, sink current 500
A
0
0.4
V
INTERFACE TIMING
tStart
Start time
2
s
tH_LB
High time low bit, logic 0 detection
Signal level on MODE/DATA pin is > 1.2V
2
200
s
tL_LB
Low time low bit, logic 0 detection
Signal level on MODE/DATA pin < 0.4V
2x
400
s
tH_LB
tL_HB
Low time high bit, logic 1 detection
Signal level on MODE/DATA pin < 0.4V
2
200
s
tH_LB
High time high bit, logic 1 detection
Signal level on MODE/DATA pin is > 1.2V
2x
400
s
tL_HS
TEOS
End of Stream
TEOS
2
s
tACKN
Duration of acknowledge condition
VIN 2.5V to 6V
400
520
s
(MODE/DATE line pulled low by the
device)
tvalACK
Acknowledge valid time
2
s
ttimeout
Timeout for entering power save
MODE/DATA Pin changes from high to low
520
s
mode
(1)
Device is switching with no load on the output, L = 3.3
H, value includes losses of the coil
(2)
These values are valid after the device has been already enabled one time (EN1 or EN2 = high) and supply voltage VIN has not
powered down.
(3)
These values are valid when the device is disabled (EN1 and EN2 low) and supply voltage VIN is powered up. The values remain valid
until the device has been enabled first time (EN1 or EN2 = high). After first enable, Note 3 becomes valid.
3
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