參數(shù)資料
型號(hào)： TPS62290DRV
廠商： Texas Instruments, Inc.
英文描述： Half Bridge Gate Driver; Package: 8-SO-8; Container: Tape & Reel
中文描述： 1降壓轉(zhuǎn)換器2步驟× 2 SON封裝
文件頁(yè)數(shù)： 3/23頁(yè)
文件大?。?/td> 615K
代理商： TPS62290DRV
www.ti.com
ELECTRICAL CHARACTERISTICS
Over full operating ambient temperature range, typical values are at T
A
= 25
°
C. Unless otherwise noted, specifications apply
for condition V
= EN = 3.6V. External components C
IN
= 4.7
μ
F 0603, C
OUT
= 10
μ
F 0603, L = 2.2
μ
H, refer to parameter
measurement information.
TPS62290
SLVS764–JUNE 2007
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
V
I
Input voltage range
2.3
6
V
V
IN
2.7 V to 6 V
V
IN
2.5 V to 2.7 V
V
IN
2.3 V to 2.5 V
I
= 0 mA, PFM mode enabled
(MODE = GND) device not switching,
See
(1)
I
= 0 mA, switching with no load
(MODE = V
IN
) PWM operation,
V
O
= 1.8 V, V
IN
= 3V
EN = GND
Falling
Rising
1000
600
300
I
O
Output current
mA
15
μ
A
I
Q
Operating quiescent current
3.8
mA
I
SD
Shutdown current
0.1
1.85
1.95
1
μ
A
UVLO
Undervoltage lockout threshold
V
ENABLE, MODE
High level input voltage, EN,
MODE
Low level input voltage, EN,
MODE
Input bias current, EN, MODE
POWER SWITCH
High side MOSFET on-resistance
R
DS(on)
Low side MOSFET on-resistance
Forward current limit MOSFET
I
LIMF
high-side and low side
Thermal shutdown
T
SD
Thermal shutdown hysteresis
OSCILLATOR
f
SW
Oscillator frequency
OUTPUT
V
O
Adjustable output voltage range
V
ref
Reference voltage
2.3 V
≤
V
IN
≤
6 V
1
V
IN
V
IH
V
2.3 V
≤
V
IN
≤
6 V
0
0.4
V
IL
V
I
I
EN, MODE = GND or V
IN
0.01
1
μ
A
240
185
480
380
V
IN
= V
GS
= 3.6 V, T
A
= 25
°
C
m
V
IN
= V
GS
= 3.6 V
1.19
1.4
1.68
A
Increasing junction temperature
Decreasing junction temperature
140
20
°
C
2.3 V
≤
V
IN
≤
6 V
2.0
2.25
2.5
MHz
0.6
V
I
V
600
mV
MODE = V
IN
, PWM operation,
2.3 V
≤
V
IN
≤
6 V, See
(2)
MODE = GND, device in PFM mode,
+1% voltage positioning active, See
(1)
V
FB(PWM)
Feedback voltage
–1.5%
0
1.5%
V
FB(PFM)
Feedback voltage PFM mode
1%
Load regulation
- 0.5
500
%/A
Time from active EN to reach 95% of
V
O
Time to ramp from 5% to 95% of V
O
V
= 3.6 V, V
I
= V
O
= V
SW
, EN = GND,
See
(3)
t
Start Up
Start-up time
μ
s
t
Ramp
V
O
ramp-up time
250
μ
s
I
lkg
Leakage current into SW pin
0.1
1
μ
A
(1)
(2)
(3)
In PFM mode, the internal reference voltage is set to typ. 1.01
×
V
ref
. See the parameter measurement information.
For V
= V
+ 1.0 V
In fixed output voltage versions, the internal resistor divider network is disconnected from FB pin.
3
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