參數(shù)資料
型號(hào)： TPS62240DRV
廠商： Texas Instruments, Inc.
英文描述： 2.25 MHz 300 mA Step Down Converter in 2x2SON/TSOT23 Package
中文描述： 2.25兆赫300毫安降壓轉(zhuǎn)換器2x2SON/TSOT23包
文件頁(yè)數(shù)： 3/29頁(yè)
文件大?。?/td> 859K
代理商： TPS62240DRV
www.ti.com
ELECTRICAL CHARACTERISTICS
Over full operating ambient temperature range, typical values are at T
A
= 25
°
C. Unless otherwise noted, specifications apply
for condition V
IN
= EN = 3.6V. External components C
IN
= 4,7
μ
F 0603, C
OUT
= 10
μ
F 0603, L = 2.2
μ
H, refer to parameter
measurement information.
TPS62240, TPS62242, TPS62243
SLVS762B–JUNE 2007–REVISED SEPTEMBER 2007
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
V
IN
Input voltage range
2
6
V
2.3 V
≤
V
IN
≤
6 V
2 V
≤
V
IN
≤
2.3 V
I
= 0 mA. PFM mode enabled (MODE = GND)
device not switching
I
= 0 mA. PFM mode enabled (MODE = GND)
device switching, V
OUT
= 1.8 V,
(1)
I
= 0 mA, switching with no load (MODE = V
IN
),
PWM operation , V
OUT
= 1.8 V, V
IN
= 3 V
EN = GND
Falling
Rising
300
150
I
OUT
Output current
mA
15
μ
A
I
Q
Operating quiescent current
18.5
3.8
mA
I
SD
Shutdown current
0.1
1.85
1.95
1
μ
A
UVLO
Undervoltage lockout threshold
V
ENABLE, MODE
V
IH
V
IL
I
IN
POWER SWITCH
High level input voltage, EN, MODE
Low level input voltage, EN, MODE
Input bias current, EN, MODE
2 V
≤
V
IN
≤
6 V
2 V
≤
V
IN
≤
6 V
EN, MODE = GND or VIN
1
0
V
IN
0.4
V
V
μ
A
0.01
1
High side MOSFET on-resistance
Low side MOSFET on-resistance
Forward current limit MOSFET
high-side and low side
Thermal shutdown
Thermal shutdown hysteresis
OSCILLATOR
f
SW
Oscillator frequency
OUTPUT
V
OUT
Adjustable output voltage range
V
ref
Reference Voltage
240
180
480
380
R
DS(on)
V
IN
= V
GS
= 3.6 V, T
A
= 25
°
C
m
I
LIMF
VIN = VGS = 3.6 V
0.56
0.7
0.84
A
TSD
Increasing junction temperature
Decreasing junction temperature
140
20
°
C
°
C
2 V
≤
V
IN
≤
6 V
2
2.25
2.5
MHz
0.6
V
IN
V
600
mV
MODE = V
, PWM operation, 2 V
≤
V
IN
≤
6 V, in
fixed output voltage versions V
FB
= V
OUT
, See
(2)
MODE = GND, device in PFM mode
Feedback voltage
–1.5%
0% 1.5%
V
FB
Feedback voltage PFM mode
Load regulation
Start-up Time
V
OUT
ramp UP time
Leakage current into SW pin
0%
-0.5
500
250
0.1
%/A
μ
s
μ
s
μ
A
t
Start Up
t
Ramp
I
lkg
Time from active EN to reach 95% of V
OUT
nominal
Time to ramp from 5% to 95% of V
OUT
V
IN
= 3.6 V, V
IN
= V
OUT
= V
SW
, EN = GND,
(3)
1
(1)
(2)
(3)
See the parameter measurement information.
for V
IN
= V
O
+ 0.6
In fixed output voltage versions, the internal resistor divider network is disconnected from FB pin.
Copyright 2007, Texas Instruments Incorporated
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Product Folder Link(s):
TPS62240 TPS62242 TPS62243
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