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CAPACITOR SELECTION
Input Capacitor
Output Capacitor
Cmin
IOUT
VOUT
V
VIN
VOUT
(17)
VESR
IOUT
RESR
(18)
CHECKING LOOP STABILITY
The first step of circuit and stability evaluation is to look from a steady-state perspective at the following signals:
Switching node, SW
Inductor current, I
L
Output ripple voltage, V
OUT(AC)
These are the basic signals that need to be measured when evaluating a switching converter. When the
switching waveform shows large duty cycle jitter or the output voltage or inductor current shows oscillations, the
regulation loop may be unstable. This is often a result of board layout and/or L-C combination.
TPS61058
TPS61059
SLVS572B–APRIL 2005–REVISED DECEMBER 2005
For good input voltage filtering low ESR ceramic capacitors are recommended. At least a 10-μF input capacitor is
recommended to improve transient behavior of the regulator and EMI behavior of the total power supply circuit.
The input capacitor should be placed as close as possible to the input pin of the converter.
The major parameter necessary to define the output capacitor is the maximum allowed output voltage ripple of
the converter. This ripple is determined by two parameters of the capacitor, the capacitance and the ESR. It is
possible to calculate the minimum capacitance needed for the defined ripple, supposing that the ESR is zero, by
using
Equation 17
:
Parameter
f
is the switching frequency and
V is the maximum allowed ripple.
With a chosen ripple voltage of 10 mV, a minimum capacitance of 22 μF is needed. The total ripple is larger due
to the ESR of the output capacitor. This additional component of the ripple can be calculated using
Equation 18
:
The total ripple is the sum of the ripple caused by the capacitance and the ripple caused by the ESR of the
capacitor. Additional ripple is caused by load transients. This means that the output capacitor has to completely
supply the load during the charging phase of the inductor. A reasonable value of the output capacitance depends
on the speed of the load transients and the load current during the load change.
For the high current white LED application, a minimum of 20 μF effective output capacitance is usually required
when operating with 4.7 μH (typ) inductors. For solution size reasons, this is usually one or more X5R/X7R
ceramic capacitors. In order to maintain the control loop stable, the addition of a compensation network formed
by R1 (22 k
) and C3 (1 nF COG) is necessary.
As a next step in the evaluation of the regulation loop, the load transient response is tested. V
OUT
can be
monitored for settling time, overshoot or ringing that helps judge the converter's stability. Without any ringing, the
loop has usually more than 45
°
of phase margin.
Because the damping factor of the circuitry is directly related to several resistive parameters (e.g., MOSFET
r
DS(on)
) that are temperature dependant, the loop stability analysis has to be done over the input voltage range,
LED current range, and temperature range.
17