參數(shù)資料
型號: TPS54226PW
廠商: TEXAS INSTRUMENTS INC
元件分類: 穩(wěn)壓器
封裝: PACKAGE-14
文件頁數(shù): 4/20頁
文件大?。?/td> 501K
代理商: TPS54226PW
L =
O
V
OUT
V
IN(max)
V
IN(max)
OUT
-
I
f
Kind
OUT
SW
Ilp-p=
V
OUT
V
IN(max)
V
-V
IN(max)
OUT
L
f
O
SW
I
=I +
lpeak
O
Ilp-p
2
SLVSA14B – OCTOBER 2009 – REVISED JUNE 2010
www.ti.com
DESIGN GUIDE
Step By Step Design Procedure
This example details the design of a switching regulator design using ceramic output capacitors.
This design is available as the HPA539 evaluation module (EVM). A few parameters must be known in order
to
start the design process. These parameters are typically determined on the system level. For this example,
start with the following known parameters:
Input voltage range = 4.5 -18 V
Output voltage = 1.05 V
Output current = 2 A
Output voltage ripple = 3% of output voltage (1.05 V x 0.03 = 31.5 mV
Figure 14 shows the schematic diagram for this design example.
Figure 14. Schematic
Output Inductor Selection
The inductance value is selected to provide approximately 30% peak to peak ripple current at maximum load.
Larger ripple current increases output ripple voltage, improves S/N ratio and contributes to stable operation.
Smaller ripple currents result in lower output voltage ripple. When using low ESR output capacitors output ripple
voltage is usually low, so larger ripple currents are acceptable. The coefficient Kind represents the percentage of
ripple current. The value of Kind must not be greater than 0.4. Use 0.3 when using low ESR output capacitors.
Equation 3 can be used to calculate L1. Use 700 kHz for fSW. Make sure the chosen inductor is rated for the
peak current of Equation 5 and the RMS current of Equation 6.
(3)
(4)
(5)
12
Copyright 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): TPS54226
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