參數(shù)資料
型號: TPS40055MPWPREPG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 穩(wěn)壓器
英文描述: SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO16
封裝: PLASTIC, HTSSOP-16
文件頁數(shù): 8/35頁
文件大?。?/td> 2348K
代理商: TPS40055MPWPREPG4
SGLS310B – JULY 2005 – REVISED OCTOBER 2010
www.ti.com
Calculate the Poles and Zeros
For a buck converter using voltage mode control, there is a double pole due to the output L-CO. The double pole
is located at the frequency calculated in Equation 21.
(21)
There is also a zero created by the output capacitance CO) and its associated ESR. The ESR zero is located at
the frequency calculated in Equation 22.
(22)
Calculate the value of RBIAS to set the output voltage (VOUT).
(23)
The maximum crossover frequency (0 dB loop gain) is calculated in Equation 24.
(24)
Typically, fC is selected to be close to the midpoint between the L-CO double pole and the ESR zero. At this
frequency, the control to output gain has a -2 slope (–40 dB/decade), while the Type III topology has a +1 slope
(20 dB/decade), resulting in an overall closed loop –1 slope (–20 dB/decade). Figure 12 shows the modulator
gain, L-C filter, output capacitor ESR zero, and the resulting response to be compensated.
MODULATOR GAIN
vs
SWITCHING FREQUENCY
Figure 11. PWM Modulator Relationships
Figure 12.
A Type III topology, shown in Figure 13, has 2 zero-pole pairs in addition to a pole at the origin. The gain and
phase boost of a Type III topology is shown in Figure 14. The two zeros are used to compensate the L-CO
double pole and provide phase boost. The double pole is used to compensate for the ESR zero and provide
controlled gain roll-off. In many cases, the second pole can be eliminated and the amplifier's gain roll-off used to
roll-off the overall gain at higher frequencies. Figure 13.
16
Copyright 2005–2010, Texas Instruments Incorporated
Product Folder Link(s): TPS40055-EP
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