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參數(shù)資料
| 型號(hào)： | TPS31XXEXX |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | ULTRALOW SUPPLY-CURRENT/SUPPLY-VOLTAGE SUPERVISORY CIRCUITS |
| 中文描述： | 超低SUPPLY-CURRENT/SUPPLY-VOLTAGE監(jiān)控電路 |
| 文件頁(yè)數(shù)： | 11/19頁(yè) |
| 文件大小： | 306K |
| 代理商： | TPS31XXEXX |
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TPS31xxExx, TPS31xxH20, TPS31xxK33
ULTRALOW SUPPLY-CURRENT/SUPPLY-VOLTAGE SUPERVISORY CIRCUITS
SLVS363
–
AUGUST 2001
11
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETERS
TEST CONDITIONS
VDD = 3.3 V, IOH =
–
3 mA
VDD = 1.8 V, IOH =
–
2 mA
VDD = 1.5 V, IOH =
–
1 mA
VDD = 0.9 V, IOH =
–
0.4 mA
VDD = 0.5 V, IOH =
–
5
μ
A
VDD = 3.3 V, IOL = 3 mA
VDD = 1.5 V, IOL = 2 mA
VDD = 1.2 V, IOL = 1 mA
VDD = 0.9 V, IOL = 500
μ
A
VDD = 0.4 V, IOL = 5
μ
A
MIN
TYP
MAX
UNIT
0 8
×
0.8
VDD
VOH
High-level output voltage
High level out ut voltage
V
0.7
×
VDD
Low-level output
voltage
0 3
0.3
VOL
V
RESET only
0.1
TPS31xxE09
0.854
0.86
0.866
TPS31xxE12
1.133
1.142
1.151
VIT
–
Negative-going input
threshold voltage (see
Note 4)
TPS31xxE15
TA = 25
°
C
1.423
1.434
1.445
V
TPS31xxE16
1.512
1.523
1.534
TPS31xxH20
1.829
1.843
1.857
TPS31xxK33
2.919
2.941
2.963
VIT
–
(S)
Negative-going input
threshold voltage (see
Note 4)
SENSE, PFI
VDD
≥
0.8 V, TA = 25
°
C
0.542
0.551
0.559
V
0.8 V
≤
VIT
<
1.5 V
1.6 V
≤
VIT
<
2.4 V
2.5 V
≤
VIT
<
3.3 V
TA =
–
40
°
C to 85
°
C
VDD
≥
0.8 V
MR = VDD, VDD = 3.3 V
SENSE, PFI, WDI = VDD,
VDD = 3.3 V
MR = 0 V, VDD = 3.3 V
SENSE, PFI, WDI = 0 V, VDD = 3.3 V
20
Vhys
Hysteresis at VDD input
Hysteresis at VDD in ut
30
mV
50
T(K)
Vhys
Temperature coefficient of VIT
–
, PFI, SENSE
Hysteresis at SENSE, PFI input
–
0.012
–
0.019
%/K
15
mV
MR
–
25
25
IIH
High-level input current
SENSE, PFI, WDI
–
25
25
nA
IIL
Low level input current
Low-level input current
MR
–
47
–
33
–
25
μ
A
nA
SENSE, PFI, WDI
–
25
25
IOH
High-level output
current at RESET (see
Note 5)
Open drain
VDD = VIT + 0.2 V, VOH = 3.3 V
200
nA
VDD
>
VIT (average current),
VDD
<
1.8 V
VDD
>
VIT (average current),
VDD
>
1.8 V
VDD
<
VIT, VDD
<
1.8 V
VDD
<
VIT, VDD
>
1.8 V
1.2
3
IDD
Supply current
2
4.5
μ
A
22
27
Internal pullup resistor at MR
70
100
130
k
Ci
Input capacitance at MR, SENSE, PFI, WDI
3. The lowest voltage at which the RESET output becomes active tr(VDD)
≥
15
μ
s/V.
4. To ensure the best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1
μ
F) should be placed close to the supply
terminals.
5. Also refers to RSTVDD and RSTSENSE
VI = 0 V to VDD
1
pF
NOTES:
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