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參數(shù)資料
| 型號(hào)： | TPS3128-xx |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | ULTRA-LOW VOLTAGE PROCESSOR SUPERVISORY CIRCUITS |
| 中文描述： | 超低電壓處理器監(jiān)控電路 |
| 文件頁數(shù)： | 6/12頁 |
| 文件大?。?/td> | 218K |
| 代理商： | TPS3128-XX |
www.ti.com
DISSIPATION RATING TABLE
RECOMMENDED OPERATING CONDITIONS
at specified temperature range
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted)
TPS3123-xx
TPS3124-xx, TPS3125-xx
TPS3126-xx, TPS3128-xx
SLVS227B–AUGUST 1999–REVISED FEBRUARY 2004
T
≤
25
°
C
POWER RATING
437 mW
DERATING FACTOR
ABOVE T
A
= 25
°
C
3.5 mW/
°
C
T
= 70
°
C
POWER RATING
280 mW
T
= 85
°
C
POWER RATING
227 mW
PACKAGE
DBV
MIN
0.75
0.85
0.0
MAX
3.3
3.3
UNIT
T
A
= 0
°
C to 85
°
C
T
A
= -40
°
C to 85
°
C
Supply voltage, V
DD
V
Manual reset voltage, V
DD
Watchdog input voltage, V
WD1
High-level input voltage, V
IH
Low-level input voltage, V
IL
Input transition rise and fall rate at WDI,
t/
V
Operating free-air temperature range, T
A
V
DD
+0.3
V
DD
+0.3
V
V
V
V
0
0.7
×
V
DD
0.3
×
V
DD
1
μs/V
°
C
40
85
PARAMETER
TEST CONDITIONS
MIN
TYP
27
MAX
UNIT
k
MR pullup resistor (internal)
WDI
MR
WDI
MR
TPS3126-xx,
TPS3128-xx
WDI = V
DD
= 3.3 V
MR = 0.7
×
V
DD
,
WDI = 0 V,
MR = 0 V,
1
1
I
IH
High-level input current
μA
V
DD
= 3.3 V
V
DD
= 3.3 V
V
DD
= 3.3 V
20
55
1
1
I
IL
Low-level input current
μA
80
170
High-level output current
(leakage into RESET pin)
I
OH
V
DD
= V
OH
= 3.3 V
200
nA
V
DD
= 1.5 V,
V
DD
= 3.3 V,
V
DD
= 0.75 V,
V
DD
= 1.5 V,
V
DD
= 0.75 V,
V
DD
= 1.5 V,
V
DD
= 1.5 V,
V
DD
= 3.3 V,
I
OH
= -1 mA
I
OH
= -4.5 mA
I
OH
= -8 μA
I
OH
= -1 mA
I
OL
= 15 μA
I
OL
= 1.4 mA
I
OL
= 1.4 mA
I
OL
= 3 mA
RESET
High-level output voltage
(TPS3123/4/5 only)
V
OH
0.8
×
V
DD
V
RESET
RESET
0.2
×
V
DD
V
OL
Low-level output voltage
V
RESET
0.4
1.12
1.45
1.68
2.71
1.18
1.48
1.77
TPS312xJ12
TPS312xG15
TPS312xJ18
TPS312xL30
TPS312xE12
TPS312xE15
TPS312xE18
1.04
1.35
1.56
2.57
1.10
1.38
1.65
1.08
1.40
1.62
2.64
1.14
1.43
1.71
15
20
30
Negative-going input threshold
voltage
(1)
V
IT-
T
A
= -40
°
C to 85
°
C
V
1 V < V
IT-
< 1.4 V
1.4 V < V
IT-
<2 V
2 V < V
IT-
< 3 V
V
hys
Hysteresis at V
DD
input
mV
(1)
To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 μF) should be placed near the supply terminal.
6
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