參數(shù)資料
型號: TPS24711DGSR
廠商: Texas Instruments
文件頁數(shù): 8/34頁
文件大?。?/td> 2792K
描述: IC CTRLR HOT SWAP 2.5-18V 10MSOP
標(biāo)準(zhǔn)包裝: 1
類型: 熱交換控制器
應(yīng)用: 通用
內(nèi)部開關(guān):
電流限制: 可調(diào)
電源電壓: 2.5 V ~ 18 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-MSOP
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: 296-28562-6
LIM
3125
R
R
=
?/DIV>
TPS24710,TPS24711
TPS24712,TPS24713
SLVSAL2E JANUARY 2011REVISED NOVEMBER 2013
www.ti.com
  V
VCC
drops below the UVLO threshold
2.  GATE is pulled down by a 1 A current source for 13.5 祍 when a hard output short circuit occurs and
V
(VCC    SENSE)
is greater than 60 mV, i.e., the fast-trip shutdown threshold. After fast-trip shutdown is
complete, an 11-mA sustaining current ensures that the external MOSFET remains off.
3.  GATE is discharged by a 20 k& resistor to GND if the chip die temperature exceeds the OTSD rising
threshold.
GATE  remains  low  in  latch  mode  (TPS24710/12)  and  attempts  a  restart  periodically  in  retry  mode
(TPS24711/13).
If used, any capacitor connecting GATE and GND should not exceed 1 糉 and it should be connected in series
with a resistor of no less than 1 k&. No external resistor should be directly connected from GATE to GND or from
GATE to OUT.
GND: This pin is connected to system ground.
OUT: This pin allows the controller to measure the drain-to-source voltage across the external MOSFET M
1
. The
power-good indicator (PG/PGb) relies on this information, as does the power limiting engine. The OUT pin should
be protected from negative voltage transients by a clamping diode or sufficient capacitors. A Schottky diode of
3 A / 40 V in a SMC package is recommended as a clamping diode for high-power applications. The OUT pin
should be bypassed to GND with a low-impedance ceramic capacitor in the range of 10 nF to 1 糉.
PG: PG is assigned for TPS24712/13. This active-high, open-drain output is intended to interface to downstream
dc/dc converters or monitoring circuits. PG assumes high-impedance after the drain-to-source voltage of the FET
has fallen below 170 mV and a 3.4-ms deglitch delay has elapsed. It pulls low when V
DS
exceeds 240 mV. PG
assumes low-impedance status after a 3.4-ms deglitch delay once V
DS
of M
1
rises up, resulting from GATE being
pulled to GND at any of the following conditions:
"   An overload current fault occurs (V
SENSE
> 25 mV).
"   A hard output short circuit occurs, leading to V
(VCC  SENSE)
greater than 60 mV, i.e., the fast-trip shutdown
threshold has been exceeded.
"   V
EN
is below its falling threshold.
"   V
VCC
drops below the UVLO threshold.
"   Die temperature exceeds the OTSD threshold.
This pin can be left floating when not used.
PGb:  PGb  is  assigned  for  TPS24710/11.  This  active-low,  open-drain  output  is  intended  to  interface  to
downstream dc/dc converters or monitoring circuits. PGb pulls low after the drain-to-source voltage of the FET
has fallen below 170 mV and a 3.4-ms deglitch delay has elapsed. It goes open-drain when VDS exceeds 240
mV. PGb assumes high-impedance status after a 3.4-ms deglitch delay once V
DS
of M
1
rises up, resulting from
GATE being pulled to GND at any of the following conditions:
"   An overload current fault occurs (V
SENSE
> 25 mV).
"   A hard output short circuit occurs, leading to V
(VCC  SENSE)
greater than 60 mV, i.e., the fast-trip shutdown
threshold has been exceeded.
"   V
EN
is below its falling threshold.
"   V
VCC
drops below the UVLO threshold.
"   Die temperature exceeds the OTSD threshold.
This pin can be left floating when not used.
PROG: A resistor from this pin to GND sets the maximum power permitted in the external MOSFET M
1
during
inrush. Do not apply a voltage to this pin. If the constant power limit is not desired, use a PROG resistor of
4.99 k&. To set the maximum power, use Equation 1,
(1)
where P
LIM
is the allowed power limit of MOSFET M
1
. R
SENSE
is the load-current-monitoring resistor connected
between the VCC pin and the SENSE pin. R
PROG
is the resistor connected from the PROG pin to GND. Both
R
PROG
and R
SENSE
are in ohms and P
LIM
is in watts. P
LIM
is determined by the maximum allowed thermal stress of
MOSFET M
1
, given by Equation 2,
8
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Copyright ?20112013, Texas Instruments Incorporated
Product Folder Links: TPS24710  TPS24711 TPS24712  TPS24713
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