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參數(shù)資料
| 型號： | TPS2383PM |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | OCTAL POWER SOURCING EQUIPMENT POWER MANAGER |
| 中文描述： | 八路供電設(shè)備電源管理器 |
| 文件頁數(shù)： | 7/27頁 |
| 文件大?。?/td> | 394K |
| 代理商： | TPS2383PM |
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SLUS559B APRIL 2003 REVISED JULY 2004
7
www.ti.com
TERMINAL FUNCTIONS (continued)
TERMINAL
NAME
I/O
DESCRIPTION
PIN
PORT ANALOG SIGNALS (continued)
1G
3
O
2G
6
O
3G
11
O
Port gate. Connect to the gate of an external N-channel MOSFET. During turn-on, this pin is controlled by a
linear current amplifier (LCA) such that the load current ramps up from zero to a maximum sourcing current of
425 mA. This pin is driven to as high as 10 V. During controlled turn-off, this pin is driven such that the load
current ramps down from a maximum of 425 mA to zero. The capacitor on the CR pin is utilized to generate the
ramp control signal voltages. During a fault turn-off this pin is discharged quickly with a low on-resistance
internal switch.
4G
14
O
5G
35
O
6G
38
O
7G
43
O
8G
46
O
1RS
4
I
2RS
5
I
3RS
12
I
Port resistor sense. This is the kelvin sense path for the high potential end of the load current sense resistor.
Parameters controlled by the load current sense resistor include: the average undercurrent/overcurrent and
current levels. Use a 0.5-
load current sense resistor to be compliant to the 802.3 specification levels.
4RS
13
I
5RS
36
I
6RS
37
I
peak-load current thresholds, the peak PD inrush current limit during startup, and the nominal classification
7RS
44
I
8RS
45
I
ANALOG SIGNALS
CR
50
I
Ramp capacitor. During load power up and down, this capacitor is used as the di/dt current slew capacitor. A
1.5-V peak triangular waveform is present on this pin during ramp up/down. Connect a 0.1-
μ
F capacitor from
this pin to AG2 and a 120-k
resistor at RT to meet the 802.3af specification timing levels.
Timing capacitor. This capacitor and the resistor on the RT pin set the internal clock frequency of the device.
This clock is used for the internal state machine, integrating A/D counters, POR time-out, and fault and delay
timers of each port. Use a 100-pF to 470-pF capacitor for CT and a 120-k
resistor on RT to set the internal
clock in a range of 100 kHz to 500 kHz. This timing can be overridden by driving the CT pin with a 0 V to 5 V
square wave with a frequency from 0 kHz to 500 kHz.
CT
52
I
CINT
30
I
This capacitor is used for the ramp A/D converter signal integration. Connect a 0.033-
μ
F capacitor from this pin
to RG. For minimal errors due to dielectric absorption, use a poly or Teflon capacitor type. Ceramic types can be
used, but note the increased conversion error.
L1
17
O
L2
18
O
L3
19
O
L4
20
O
LED lamp drivers. Dual or single color LEDs can be connected to each of these pins. Each pin indicates the
state of the corresponding port. This is a tri-state port that is under full control of the host micro-controller. As
such it can also be used as a data port, or general-purpose output driver.
L5
21
O
L6
22
O
L7
23
O
L8
24
O
RD
32
I
The discovery current-sense resistor is connected in the path from the RD pin to RG ground. The discovery
current-sense resistor sets the discovery value to 25-k
(nominal) when a 665-
value is used. For best noise
performance, de-couple this pin with a 0.68-
μ
F, ceramic capacitor to RG ground.
Bias set resistor. This resistor sets all precision bias currents within the device. This pin is forced to an internal
1.25-V reference voltage level. The current that flows into this resistor due to the applied 1.25-V bias is
replicated and used throughout the device. This resistor also works in conjunction with the capacitors on CR,
CT and CINT to set internal timing values. Use a 120-k
resistor to be compliant to the requirements of 802.3af.
RT
31
I
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