參數(shù)資料
型號： TPS2383
廠商： Texas Instruments, Inc.
英文描述： Power Over Ethernet Switch Side Manager
中文描述： 以太網(wǎng)供電開關(guān)側(cè)管理器
文件頁數(shù)： 15/27頁
文件大小： 394K
代理商： TPS2383
SLUS559B APRIL 2003 REVISED JULY 2004
15
www.ti.com
FUNCTIONAL DESCRIPTION
Chip Address
The address field of the TPS2383 is eight bits and contains five bits of device address select, a read/write bit,
and two reserved bits per Table 1. The leading two bits are reserved for future port expansion, and must be set
to 0 for address acknowledge. The five device address select bits follow this. These bits are compared against
the hard-wired state of the corresponding, device address select pins (A1 through A5). When the field contents
are equivalent to the pin logic states, the device is addressed. These bits are followed by a least significant bit
(LSB), which is used to set the read or write condition (1 for read and 0 for write). Following a start condition
and an address field, the TPS2383 responds with an acknowledgement by pulling the SDA line low during the
ninth clock cycle if the address field is equivalent to the value programmed by the pins. The SDA line remains
a stable low while the ninth clock pulse is high.
Table 1. Address Selection Field
BIT
FUNCTION
A7
Future expansion (set to 0)
A6
Future expansion (set to 0)
A5
Device address. Compared with A5
A4
Device address. Compared with A4
A3
Device address. Compared with A3
A2
Device address. Compared with A2
A1
Device address. Compared with A1
A0
Read/write
Port/Register Cycle
After the chip address cycle, the TPS2383 accepts eight bits of port/register select data as defined in Table 2.
The SCL line high-to-low transition after the eighth data bit then latches the selection of the appropriate internal
register for the follow on data read or write operation. After latching the eight-bit data field, the TPS2383 pulls
the SDA line low for one clock cycle.
Data Write Cycle
For a data write sequence, after the Port/Register address cycle, the TPS2383 accepts the eight bits of data.
The data is latched into the previously selected Write Register, and the TPS2383 generates a data acknowledge
pulse by pulling the SDA line low for one clock cycle. To reset the interface, the host or master subsequently
generates a Stop bit by releasing the SDA line during the clock-high portion of an SCL pulse.
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參數(shù)描述
TPS2383APM 功能描述:熱插拔功率分布 Octal Pwr Sourcing Equip Pwr Manager RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube
TPS2383APMG4 功能描述:熱插拔功率分布 Octal Pwr Sourcing Equip Pwr Manager RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube
TPS2383APMR 功能描述:熱插拔功率分布 Octal Pwr Sourcing Equip Pwr Manager RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube
TPS2383APMRG4 功能描述:熱插拔功率分布 Octal Pwr Sourcing Equip Pwr Manager RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube
TPS2383BPM 功能描述:熱插拔功率分布 Octal Power Sourcing Equipment Mngr RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube
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