參數(shù)資料
型號(hào): TPS2371PWRG4
廠商: Texas Instruments
文件頁數(shù): 12/19頁
文件大小: 0K
描述: IC PWR INTRFCE SW FOR POE 8TSSOP
標(biāo)準(zhǔn)包裝: 2,000
應(yīng)用: 用于以太網(wǎng)供電(PoE)設(shè)備的電源接口開關(guān)
接口: IEEE 802.3af
封裝/外殼: 8-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 8-TSSOP
包裝: 帶卷 (TR)
安裝類型: 表面貼裝
TPS2371
SLUS566A JULY 2003 REVISED NOVEMBER 2003
2
www.ti.com
DESCRIPTION (continued)
The TPS2371 drives an internal low-side FET for control of the return side of the power path. The internal FET
is turned on when the input voltage reaches 36 V and above. When the input voltage decreases, the FET
remains on until the input voltage drops to below 30 V.
During initial turn-on of the switch (inrush mode), an external resistor is used to program the inrush current,
allowing a wide range of capacitor values to be used at the load. According to IEEE 802.3af specification, inrush
current of 400 mA is allowed only for 50 ms, limiting the load capacitor to approximately 180
F. A programmable
inrush current limit removes this limitation, allowing a larger capacitor to be used with a lower inrush current limit.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS
Over operating free-air temperature range unless otherwise noted (2)
TPS2371
UNIT
ILIM, DELAY
4
Input voltage range, wrt VEE
CLASS
12
V
Input voltage range, wrt VEE
DET, RTN, EN_DC, VDD
68
V
Operating junction temperature range, TJ
55 to 150
°C
Storage temperature, Tstg
65 to 150
°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
300
°C
(2)
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions”
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
MIN
NOM
MAX
UNIT
Input voltage, VI
48
57
V
Operating junction temperature, TJ
0
70
°C
DISSIPATION RATINGS(3)(4)
PACKAGE
THERMAL IMPEDANCE
JUNCTION-TO-AMBIENT
TA < 25°C
POWER RATING
TA = 25°C
DERATING
FACTOR
TA = 70°C
POWER RATING
8-Pin Plastic TSSOP (PW)
258.5
°C/W
464 mW
3.9 mW/
°C
290 mW
8-Pin Plastic SOIC (D)
176.0
°C/W
682 mW
5.7 mW/
°C
426 mW
(3) Test board conditions:
1. 3” x 3”, 4 layers, thickness: 0.062”
2. 1.5 oz. copper traces located on the top of the PCB
3. 1.5 oz. copper ground plane on the bottom of the PCB
4. 0.5 oz. copper ground planes on the 2 internal layers
5. 12 thermal vias (see “Recommended Land Pattern” in applications section of this data sheet)
(4) Maximum power dissipation may be limited by over current protection.
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