參數(shù)資料
型號(hào): TPS2341PHPR
廠商: TEXAS INSTRUMENTS INC
元件分類(lèi): 電源管理
英文描述: 4-CHANNEL POWER SUPPLY SUPPORT CKT, PQFP48
封裝: POWERPAD, HTQFP-48
文件頁(yè)數(shù): 29/31頁(yè)
文件大?。?/td> 649K
代理商: TPS2341PHPR
TPS2341
SLUS513A MAY 2003 REVISED JULY 2004
7
www.ti.com
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
NO.
I/O
DESCRIPTION
P12VGA
42
O
Gate drive for the 12-V internal N-channel MOSFET for slot A. Connect a capacitor from this pin
to PWRGND1 to program the ramp rate. The capacitor is charged with a 5
Α current source
and discharged with a switch. The output undervoltage circuitry is disabled until the voltage on
this pin is greater than 20 V and the voltage on 5V3VGA is greater than 11 V.
P12VGB
47
O
Gate drive for the 12-V internal N-channel MOSFET for slot B. Connect a capacitor from this pin
to PWRGND2 to program the ramp rate. The capacitor is charged with a 5-
Α current source
and discharged with a switch. The output undervoltage circuitry is disabled until the voltage on
this pin is greater than 20 V and the voltage on 5V3VGB is greater than 11 V.
P12VINA
44
P
12-V input to the device and the 12-V power FET for slot A. A 0.1-
F bypass capacitor from
P12VINA to PWRGND1 is recommended.
P12VINB
45
P
12-V input to the device and the 12-V power FET for slot B. A 0.1-
F bypass capacitor from
P12VINB to PWRGND2 is recommended.
P12VOA
43
O
12-V switched output for slot A. This pin has a switched FET to ground to discharge any output
load capacitance when the output is turned off. A 0.01-
F bypass capacitor to PWRGND1 is
recommended.
P12VOB
46
O
12-V switched output for slot B. This pin has a switched FET to ground to discharge any output
load capacitance when the output is turned off. A 0.01-
F bypass capacitor to PWRGND2 is
recommended.
PGOOD
20
I
Power good input. PGOOD has hysteresis so that it can be used as a power-on reset, driven
from a slow-rising RC. PGOOD also has a 100-k
pull-up to DIGVCC.
PGOOD_OUTA
22
O
Output power good indicator for the main slot outputs. This pin is driven to DIGVCC when the
voltage on P12VGA (or P12VGB for slot B) is greater than 20 V and the voltage on 5V3VGA (or
PGOOD_OUTB
21
O
voltage on P12VGA (or P12VGB for slot B) is greater than 20 V and the voltage on 5V3VGA (or
5V3VGB for slot B) is greater than 11 V.
PWRGND1
4
G
Ground pin for the power analog section.
PWRGND2
34
G
Ground pin for the power analog section.
SCL
13
I
Serial clock line for the I2C bus.
SDA
14
I/O
Serial data line for the I2C bus.
SWA
25
I
Slot A switch input. Low indicates the slot is populated. This input has hysteresis and a 100-k
pull-up to DIGVCC, requiring only a capacitor to ground for debouncing mechanical noise.
SWB
12
I
Slot B switch input. Low indicates the slot is populated. This input has hysteresis and a 100-k
pull-up to DIGVCC, requiring only a capacitor to ground for debouncing mechanical noise.
V3IN
32
P
3.3-V input to the device. A 0.1-
F bypass capacitor from V3IN to PWRGND is recommended.
V5IN
26
P
5-V input to the device. A 0.1-
F bypass capacitor from V5IN to PWRGND is recommended.
AVAILABLE OPTIONS
TA
PACKAGE
TA
HTQFP (PHP)
40
°C to 85°C
TPS2341PHP
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