參數(shù)資料
型號(hào)： TPS2212DB
廠商： Texas Instruments, Inc.
英文描述： SINGLE-SLOT, PARALLEL INTERFACE POWER SWITCH FOR LOW POWER PC CARD SLOTS
中文描述： 單槽，并行接口電源開關(guān)的低功率的PC卡插槽
文件頁(yè)數(shù)： 15/20頁(yè)
文件大?。?/td> 296K
代理商： TPS2212DB
TPS2212
SINGLE-SLOT, PARALLEL INTERFACE POWER SWITCH
FOR LOW POWER PC CARD SLOTS
SLVS193 – APRIL 1999
15
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
voltage transitioning requirement
PC Cards are migrating from 5 V to 3.3 V to minimize power consumption, optimize board space, and increase
logic speeds. The TPS2212 meets all combinations of power delivery as currently defined in the PCMCIA
standard. The latest protocol accommodates mixed 3.3-V/5-V systems by first powering the card with 5 V, then
polling it to determine its 3.3-V compatibility. The PCMCIA specification requires that the capacitors on 3.3-V
compatible cards be discharged to below 0.8 V before applying 3.3-V power. This functions as a power reset
and ensures that sensitive 3.3-V circuitry is not subjected to any residual 5-V charge. The TPS2212 offers a
selectable VCC and VPP ground state, in accordance with PCMCIA 3.3-V/5-V switching specifications.
output ground switches
PC Card specification requires that V
CC
be discharged within 100 ms. PC Card resistance can not be relied on
to provide a discharge path for voltages stored on PC Card capacitance because of possible high-impedance
isolation by power-management schemes.
power supply considerations
The TPS2212 has multiple pins for each of its 3.3-V and 5-V power inputs and for the switched VCC outputs.
Any individual pin can conduct the rated input or output current. Unless all pins are connected in parallel, the
series resistance is significantly higher than that specified, resulting in increased voltage drops and lost power.
It is recommended that all input and output power pins be paralleled for optimum operation.
To increase the noise immunity of the TPS2212, the power supply inputs should be bypassed with a 1-
μ
F
electrolytic or tantalum capacitor paralleled by a 0.047-
μ
F to 0.1-
μ
F ceramic capacitor. It is strongly
recommended that the switched outputs be bypassed with a 0.1-
μ
F, or larger, ceramic capacitor; doing so
improves the immunity of the TPS2212 to electrostatic discharge (ESD). Care should be taken to minimize the
inductance of PCB traces between the TPS2212 and the load. High switching currents can produce large
negative voltage transients, which forward biases substrate diodes, resulting in unpredictable performance.
Similarly, no pin should be taken below –0.3 V.
calculating junction temperature
The switch resistance, r
DS(on)
, is dependent on the junction temperature, T
J
, of the die and the current through
the switch. To calculate T
J
, first find r
DS(on)
from Figures 16 through 18 using an initial temperature estimate
about 50
°
C above ambient. Then calculate the power dissipation for each switch, using the formula:
P
D
r
DSon
I
2
Next, sum the power dissipation and calculate the junction temperature:
T
J
P
D
R
JA
T
A
, R
JA
108
°
C W
Compare the calculated junction temperature with the initial temperature estimate. If the temperatures are not
within a few degrees of each other, recalculate using the calculated temperature as the initial estimate.
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