參數(shù)資料
型號： TPS2159IDGNR
廠商： Texas Instruments, Inc.
英文描述： Analog IC
中文描述： 模擬IC
文件頁數(shù)： 4/19頁
文件大?。?/td> 268K
代理商： TPS2159IDGNR
TPS2149
TPS2159
SLVS401
–
AUGUST 2001
4
www.ti.com
electrical characteristics over recommended operating junction-temperature range,
2.9 V
≤
V
I(VIN)
≤
5.5 V, T
J
=
–
40
°
C to 100
°
C (unless otherwise noted)
timing parameters, power switches
PARAMETER
TEST CONDITIONS
MIN
0.5
TYP
MAX
UNIT
ton
Turnon time OUTx switch (see Note 1)
Turnon time, OUTx switch, (see Note 1)
CL = 100
μ
F
CL = 1
μ
F
CL = 100
μ
F
CL = 1
μ
F
CL = 100
μ
F
CL = 1
μ
F
CL = 100
μ
F
CL = 1
μ
F
RL= 33
RL = 33
6
0.1
3
tff
toff
Turnoff time OUTx switch (see Note 1)
Turnoff time, OUTx switch (see Note 1)
RL= 33
RL = 33
5.5
10
ms
0.05
2
tr
Rise time OUTx switch (see Note 1)
Rise time, OUTx switch (see Note 1)
RL= 33
RL = 33
0.5
5
0.1
2
tf
Fall time OUTx switch (see Note 1)
Fall time, OUTx switch (see Note 1)
RL= 33
RL = 33
5.5
0.05
9
1.2
NOTE 1. Specified by design, not tested in production.
undervoltage lockout at VIN
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
UVLO Threshold
2.2
2.85
V
Hysteresis (see Note 1)
260
mV
μ
s
Deglitch (see Note 1)
50
NOTE 1. Specified by design, not tested in production.
electrical characteristics over recommended operating junction-temperature range,
2.9 V
≤
V
I(VIN)
≤
5.5 V, V
I(ENx)
= 0 V, V
I(LDO_EN)
= 5 V, C
L(LDO_OUT)
= 10
μ
F, T
J
=
–
40
°
C to 100
°
C
(unless otherwise noted)
3.3 V LDO
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VO
Output voltage, dc
VI(VIN) = 4.25 V to 5.25 V,
IO(LDO_OUT) = 0.5 mA to 200 mA
VI(VIN) = 3.2 V, IO(OUT1) = 150 mA,
IO(LDO_OUT) = 200 mA
VI(VIN) = 4.25 V to 5.25 V, IO(LDO_OUT) = 5 mA
VI(VIN) = 4.25 V, IO(LDO_OUT) = 5 mA to 200 mA
VI(VIN) = 4.25 V, LDO_OUT connected to GND
VO(LDO_OUT) = 3.3 V, VI(IN) = 0 V
VO(LDO_OUT) = 5.5 V, VI(IN) = 0 V
f = 1 kHz, CL(LDO_OUT) = 4.7
μ
F, ESR = 0.25
,
IO = 5 mA, VINp
–
p = 100 mV
VIN ramping up from 10% to 90% in 0.1 ms,
RL = 16
, CL(LDO_OUT) = 10
μ
F
3.20
3.3
3.40
V
Dropout voltage
0.35
V
Line regulation voltage (see Note 1)
0.1
%/V
Load regulation voltage (see Note 1)
0.4
1%
IOS
Short-circuit current limit
0.275
0.33
10
0.55
A
μ
A
μ
A
Ilkg(R)
Reverse leakage current into
LDO_OUT
10
Power supply rejection
50
dB
Ramp-up time, LDO_OUT (0% to 90%)
0.1
1
ms
Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
NOTES:
1. Specified by design, not tested in production.
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