參數(shù)資料
型號(hào): TPA2050D4YZKT
廠商: TEXAS INSTRUMENTS INC
元件分類: 音頻/視頻放大
英文描述: 0.94 W, 2 CHANNEL, AUDIO AMPLIFIER, BGA25
封裝: 2.61 X 2.61 MM, GREEN, DSBGA-25
文件頁(yè)數(shù): 9/29頁(yè)
文件大?。?/td> 931K
代理商: TPA2050D4YZKT
www.ti.com....................................................................................................................................................................................................... SLOS544 – JULY 2008
Power Management Register (Address: 2)
BIT
7
6
5
4
3
2
1
0
Function
Reserved
SWS
HPL_Enable
HPR_Enable
PA_Enable
Reserved
Reset Value
0
1
0
Reserved
These bits are reserved for future enhancements. They will not change state if programmed. If
read these bits may assume any value.
SWS
Software shutdown. Set to logic high to deactivate the TPA2050D4. Logic low reactivates the
charge pump and input amplifiers; enable headphone and Class-D amplifiers using HPL_Enable,
HPR_Enable, and PA_Enable. Default on turn-on is SWS logic high.
HPL_Enable
Headphone left channel enable. Set to logic low to deactivate left channel.
HPR_Enable Headphone right channel enable. Set to logic low to deactivate right channel.
PA_Enable
Class-D power amplifier enable. Set to logic low to deactivate both left and right Class-D power
amplifiers.
Mux Output Control Register (Address: 3)
BIT
7
6
5
4
3
2
1
0
Function
LIM_Lock
Reserved
Mode[2]
Mode1]
Mode[0]
Reset Value
0
1
Reserved
These bits are reserved for future enhancements. They will not change state if programmed. If
read these bits may assume any value.
LIM_Lock
Limiter change lockout. Set bit to logic high to prevent any changes to the HP_Vout[2:0] and
LIM_Lock bits. The LIM_Lock bit can only be returned to 0 by applying logic low to the RESET
pin or powering down VDD.
Mode[2:0]
Sets mux output mode. Refer to Modes of Operation section for details. Default mode is 001
(Stereo 1 Input mode) on power-up.
Reserved Control Register (Address: 4)
BIT
7
6
5
4
3
2
1
0
Function
Reserved
Reset Value
0
1
0
1
Reserved
These bits are reserved for future enhancements. They will not change state if programmed. If
read these bits may assume any value.
Stereo Input 1 Volume Control Register (Address: 5)
BIT
7
6
5
4
3
2
1
0
Function
Reserved
ST1_Vol[4]
ST1_Vol[3]
ST1_Vol[2]
ST1_Vol[1]
ST1_Vol[0]
Reset Value
0
1
0
1
Reserved
These bits are reserved for future enhancements. They will not change state if programmed. If
read these bits may assume any value.
ST1_Vol[4:0] Five-bit volume control for Stereo Input 1 in single-ended input mode and stereo input pair in
differential input mode. 11111 sets device to its highest gain (+12 dB); 00000 sets device to its
lowest gain (–60 dB). Default setting on power-up is 10011 (+0 dB).
Copyright 2008, Texas Instruments Incorporated
17
Product Folder Link(s): TPA2050D4
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