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參數(shù)資料
| 型號(hào)： | TP3056BDWR |
| 元件分類： | Codec |
| 英文描述： | PCM CODEC|SINGLE|CMOS|SOP|16PIN|PLASTIC |
| 中文描述： | PCM編解碼器|單|的CMOS |?？苵 16PIN |塑料 |
| 文件頁(yè)數(shù)： | 13/19頁(yè) |
| 文件大?。?/td> | 287K |
| 代理商： | TP3056BDWR |
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TP3056B
MONOLITHIC SERIAL INTERFACE
COMBINED PCMCODEC AND FILTER
SLWS072A – MAY 1998 – REVISED AUGUST 1998
13
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
system reliability and design considerations
TP3056B system reliability and design considerations are described in the following paragraphs.
latch-up
Latch-up is possible in all CMOS devices. It is caused by the firing of a parasitic SCR that is present due to the
inherent nature of CMOS. When a latch-up occurs, the device draws excessive amounts of current and will
continue to draw heavy current until power is removed. Latch-up can result in permanent damage to the device
if supply current to the device is not limited.
Even though the TP3056B is heavily protected against latch-up, it is still possible to cause latch-up under certain
conditions in which excess current is forced into or out of one or more terminals. Latch-up can occur when the
positive supply voltage drops momentarily below ground, when the negative supply voltage rises momentarily
above ground, or possibly if a signal is applied to a terminal after power has been applied but before the ground
is connected. This can happen if the device is hot-inserted into a card with the power applied, or if the device
is mounted on a card that has an edge connector and the card is hot-inserted into a system with the power on.
To help ensure that latch-up does not occur, it is considered good design practice to connect a reverse-biased
Schottky diode with a forward voltage drop of less than or equal to 0.4 V (1N5711 or equivalent) between the
power supply and GND (see Figure 3). If it is possible that a TP3056B-equipped card that has an edge connector
could be hot-inserted into a powered-up system, it is also important to ensure that the ground edge connector
traces are longer than the power and signal traces so that the card ground is always the first to make contact.
VCC
DGND
VBB
Figure 3. Latch-Up Protection Diode Connection
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TP3056B | MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER |
| TP3056BDW | MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER |
| TP3056BN | MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER |
| TP3098 | TRANSISTOR | BJT | NPN | 200MA I(C) | RFMOD |
| TP3102 | 1 Cell Li-ion Battery Protection + Cell Pack |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TP3056BN | 功能描述:接口—CODEC PCM CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TP3056J | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PARALLEL INTERFACE CODEC/FILTER COMBO |
| TP3056V | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:A-Law CODEC |
| TP3057 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Enhanced Serial Interface CODEC/Filter COMBO Family |
| TP3057A | 制造商:TI 制造商全稱:Texas Instruments 功能描述:MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER |
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