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  • 參數(shù)資料
    型號(hào): TN28F020-120
    廠商: INTEL CORP
    元件分類: DRAM
    英文描述: 28F020 2048K (256K X 8) CMOS FLASH MEMORY
    中文描述: 256K X 8 FLASH 12V PROM, 120 ns, PQCC32
    封裝: 0.450 X 0.550 INCH, PLASTIC, LCC-32
    文件頁(yè)數(shù): 31/38頁(yè)
    文件大小: 878K
    代理商: TN28F020-120
    E
    NOTES:
    1.
    Read timing characteristics during read/write operations are the same as during read-only operations. Refer to AC
    Characteristics for Read-Only Operations
    2.
    Guaranteed by design.
    3.
    The integrated stop timer terminates the programming/erase operations, thus eliminating the need for a maximum
    specification.
    4.
    See High Speed AC Testing Input/Output Waveform(Figure 8) and High Speed AC Testing Load Circuit(Figure 9) for
    testing characteristics.
    5.
    Minimum Specification for Extended Temperature product.
    6.
    See Testing Input/Output Waveform(Figure 6) and AC Testing Load Circuit(Figure 7) for testing characteristics.
    28F020
    31
    4.10
    Erase and Programming Performance
    Limits
    Parameter
    Notes
    Min
    Typ
    Max
    Unit
    Chip-Erase Time
    1, 3, 4
    2
    30
    Sec
    Chip-Program Time
    1, 2, 4
    4
    25
    Sec
    NOTES:
    1.
    “Typicals” are not guaranteed, but based on a limited number of samples from production lots. Data taken at 25
    °
    C, 12.0 V
    V
    PP
    at 0 cycles.
    Minimum byte programming time excluding system overhead is 16 μsec (10 μsec program + 6 μsec write recovery), while
    maximum is 400 μsec/byte (16 μsec x 25 loops allowed by algorithm). Max chip-programming time is specified lower than
    the worst case allowed by the programming algorithm since most bytes program significantly faster than the worst case
    byte.
    Excludes 00H programming prior to erasure.
    Excludes System-Level Overhead.
    2.
    3.
    4.
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